Lateral p-i-n Diode for Silicon Solar Cell

Abstract

intrinsic layer width = 53 μm). At the same time, performance of two configurations of lateral solar cells was investigated by experimental work. Lateral cells were successfully fabricated using polycrystalline- silicon (poly-Si) thin-film prepared by Ni silicide-induced crystallization (SIC) for the first time. I-V characteristics of two types of lateral cells, with isolated (p-i-n) cells and connected (p-i-n) cells were compared in dark and under illumination condition. The configuration with isolated cells showed clear rectifying behavior for a wider range of intrinsic region width compared to the connected cells. At the same values of intrinsic region width, a higher short-circuit current was obtained from isolated cells than the connected cells. The short-circuit current of 3.3 mA/cm2 and an open-circuit voltage of 0.13 V were obtained from a 400- nm-thick isolated cells. Regarding simulation results and the fact that no optimization was performed in the experimental work, it is expected to obtain higher efficiencies from fabrication, by means of optimizations such as surface texturing, light trapping, anti-reflection coating, and rear reflector. Findings of this work confirmed that the laterally structured p- i-n cell can be a potentially powerful means for producing highly efficient, silicon solar cell. However, in the cost of more complicated fabrication process and maybe higher cost.

In this thesis, lateral p-i-n diode for silicon solar cell application were studied. The focus was put on the characterization of the lateral structure of p-i-n diode for thin-film silicon solar cells, for the first time. The structure exploits direct light irradiation on the absorber layer, has one- side contact, and can benefit from wide intrinsic region. The efficiency parameters were calculated by considering the effect of different carrier lifetimes and recombination, as a function of intrinsic layer width, as well as the distance between p/i or n/i junctions to contacts, by simulation. From the results, optimum intrinsic region width was defined regarding carriers lifetime of the cell. Obtained results showed that the distance between p/i or n/i junction to contacts should be kept below 1 μm in order to prevent efficiency reduction. Moreover, in the simulation chapter, the effect of surface recombination on the performance of the lateral cell was evaluated by considering relatively low and relatively high surface recombination velocities (SRV). The simulation results showed that by increasing SRV from 100 cm/s to 1000 cm/s, the open-circuit voltage reduces about 19%. Thus, the requirements on the front surface passivation of the lateral cell type are very high, more than in conventional vertical type cells. Excellent parameter values were i achieved from the simulation results. 706.52 mV open-circuit voltage, 24.16 mA/Cm2 short-circuit current, 82.66% fill factor, and 14.11% efficiency were obtained from a lateral cell (thickness = 3 μm