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Variation-awae design and packaging techniques in 3D ICs
공정변이를 고려한 3차원 집적 회로 설계 및 패키징 기법

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Authors
박상도
Advisor
김태환
Major
공과대학 전기·컴퓨터공학부
Issue Date
2014-02
Publisher
서울대학교 대학원
Keywords
-
Description
학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2014. 2. 김태환.
Abstract
As CMOS scaling down, The control of variation in chip performance (i.e. speed
and power) becomes highly important to improve the chip yield. The increased variation
of chip performance demands additional design efforts such as the increase of
guard-band or longer design turnaround time (TAT), which cause degradation of both
chip performance and economic profit. Meanwhile, through-silicon via (TSV) based
3D technology has been regarded as the promising solution for long interconnect wire
and huge die size problem. Since a 3D IC is manufactured by stacking multiple dies
which are fabricated in different wafers, integration of the dies that have far different
process characteristic can enlarge the difference of device performance on different
dies within a single chip. In this dissertation, we analyze the effect of on-package
(within-chip) variation on 3D IC and presents effective methods to mitigate the onpackage
variation. First, a parametric yield improvement method is presented to resolve
the mismatches of dies having different process characteristic. Comprehensive
3D integration algorithms considering post-silicon tuning technique is developed for
the multi-layered 3D IC. Then, we show that a careful clock edge embedding in 3D
clock tree can greatly reduce the impact of on-package variation on 3D clock skew
and propose a two-step solution for the problem of on-package variation-aware layer
embedding in 3D clock tree synthesis. In summary, this dissertation presents effective
3D integration method and 3D clock tree synthesis algorithm for process-variation tolerant
3D IC designs.
Language
English
URI
http://hdl.handle.net/10371/118955
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Theses (Ph.D. / Sc.D._전기·정보공학부)
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