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Signal Processing for NAND Flash Memory Reliability Improvement : 낸드 플래시 메모리 신뢰도 향상을 위한 신호 처리 방법 연구

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Authors

이동환

Advisor
성원용
Major
공과대학 전기·컴퓨터공학부
Issue Date
2014-02
Publisher
서울대학교 대학원
Keywords
NAND flash memorysignal processingthreshold voltage distribution estimationcell-to-cell interferencesoft-decision error correction
Description
학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2014. 2. 성원용.
Abstract
The capacity of NAND flash memory has been continuously increased by aggressive technology scaling and multi-level cell (MLC) data coding. However, it becomes more challenging to maintain the current growth rate of the memory density mainly because of degraded signal quality of sub-20 nm NAND flash memory. This dissertation develops signal processing techniques to improve the signal reliability of MLC NAND flash memory.

In the first part of this dissertation, we develop two threshold voltage distribution estimation algorithms to compensate the effect of program-erase (PE) cycling and charge loss in MLC NAND flash memory. The sensing directed estimation (SDE) utilizes the output of multi-level memory sensing to estimate the means and the variances of the threshold voltage distribution that is modeled as a Gaussian mixture. In order to reduce memory sensing overheads for the SDE algorithm, we develop a decision directed estimation (DDE) that uses error corrected bit patterns for more frequent updates of the model parameters. We also present a combined estimation scheme that employs both the SDE and the DDE approaches to minimize the number of memory sensing operations while maintaining the estimation accuracy. The effectiveness of the SDE and the DDE algorithms is evaluated by using both simulated and real NAND flash memory, and it is demonstrated that the proposed algorithms can estimate the statistical information of threshold voltage distribution accurately.

The cell-to-cell interference (CCI) is one of the major sources of bit errors in sub-20 nm NAND flash memory and becomes more severe as the size of memory cell decreases. In the second part of this dissertation, we develop a CCI cancellation algorithm that is similar to interference cancellers employed in conventional communication systems. We first provide the experimental characterization of the CCI by measuring the coupling coefficients from actual NAND flash memory with a 26 nm process technology. Then, we present a CCI cancellation algorithm that consists of the coupling coefficient estimation and the CCI removal steps. To reduce the number of memory sensing operations, the optimal quantization schemes for the proposed CCI canceller are also studied.

This dissertation also develops soft-information computation schemes in order to apply soft-decision error correction to NAND flash memory. The probability density function (PDF) of the CCI removed signal is quite different from that of the original threshold voltage, which can be modeled as a Gaussian mixture. Thus, computing soft-information, such as LLR (log likelihood ratio), with the CCI removed signal is not straightforward. We propose two soft-information computation schemes that combine CCI cancellation and soft-decision error correction. In the first approach, we derive a mathematical formulation for the PDF of the CCI removed signal and directly compute the LLR values by using it. In the second approach, CCI cancellation and soft-information computation are jointly conducted. Based on the intensive simulations, it is demonstrated that the reliability of NAND flash memory is significantly improved by applying the proposed signal processing algorithms as well as soft-decision error correction.
Language
English
URI
https://hdl.handle.net/10371/118982
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