Gated-Diode Memory Cell and Array Utilizing GIDL Current

Abstract

In this dissertation, the gated-diode memory cell and array utilizing the gate-induced drain leakage (GIDL) current is proposed and investigated for ultra-high density memory device. In the gated-diode memory, there is no short-channel effect (SCE) which is the critical issue for scaling down of the cell in conventional FET type memories. In addition, the random access can be possible in array structure although the cells are connected serially like as conventional NAND flash memory array, because the n+ diffusion region is directly connected to all cells which are connected in a bit-line (BL). In the gated-diode memory, Fowler-Nordheim (FN) tunneling is used for injection of electrons and band-to-band-tunneling (BTBT) induced hot-hole injection is used for injection of holes. To sense the cell state, the GIDL current is detected with negative gate bias condition. The GIDL current is increased and decreased by the stored electrons and holes, respectively. Recent trend of nonvolatile memories are introduced in Chapter 1. In Chapter 2, Gated-diode memory utilizing the GIDL current is introduced. In Chapter 3, fabrication process and measured data of gated-diode memory cell and array utilizing GIDL current is presented. Three methods of fabrication process is represented and key process technologies are shown with SEM images. In Chapter 4, the comparison between measurement and simulation is done and improved device structure with SiGe material is investigated to increase the sensing current (GIDL current). In Appendix, the low-frequency noise (LFN) characteristics of GIDL current in MOSFETs are investigated.