A Guard Ring for Suppressing Coupling Noise Utilizing Inversion Layer for Through Silicon Via

Abstract

As technology shrinks, the implementation of high-density chip with a two-dimensional (2-D) planar architecture is becoming more difficult due to the limitation of lithography process. To overcome such scale-down limitations, a three-dimensional (3-D) package has been investigated. Among the various 3-D package technologies, a through silicon via (TSV) is a promising technology in which several chips are stacked vertically and electrically. This 3-D package can enhance the memory capacity, and implement a system with different functional chips. Although TSVs offer many advantages when used to achieve a high-density package, they also have several disadvantages, such as coupling noise. A high-frequency signal applied to a TSV induces noise in transistors near the TSV due to electrical coupling. Another issue is that copper (Cu) which is used as a conducting material of the TSV generates trap density caused by large diffusivity of Cu atoms. In this dissertation, we propose a new guard ring which consists of a shallow n+ region, a deep n-well, and an inversion layer formed along the interface between the oxide surrounding the TSV (TSV oxide) and the p-substrate. The proposed guard ring utilizes an inversion charge induced by a positive oxide charge located at the interface of the TSV oxide. We characterize quantitatively a TSV with a guard ring which is used to reduce the coupling noise from the TSV by utilizing an inversion layer as a shield layer. It is shown that a transient current due to the coupling is clearly reduced when the proposed guard ring is used. The proposed method is compared with a conventional guard ring method in terms of the drain current of a victim nMOSFET. The effective depth of the inversion layer with the signal frequency is also characterized. It is demonstrated that the high-frequency response of the guard ring can be modeled as an RC equivalent circuit. The proposed guard ring is effective in shielding the coupling noise and can be fabricated easily by modifying the ion implantation mask layer. A TSV conducting material requires high conductivity for low power consumption and high-speed operation. Cu is widely used as a TSV conducting material, but Cu atoms diffuse to the adjacent silicon substrate and transistors easily and generate traps during a low temperature annealing process. It is very important to suppress Cu diffusion and to devise a proper method to measure how many Cu atoms diffuse due to annealing. However, the characteristics of traps induced by Cu diffusion in a TSV are not easily measured because TSVs are typically located some distance away from the silicon surface, reaching a depth of tens of micrometers. For this reason, the deep part of a TSV cannot be measured. We suggest a measurement method which can be used to evaluate the trap density generated by Cu diffusion through the use of the proposed guard ring and analyze Cu diffusion as a parameter of the thickness of the barrier metal.