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Partial bus-invert coding for power optimization of system-level bus

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Authors
Shin, Youngsoo; Chae, Soo-Ik; Choi, Kiyoung
Issue Date
1998
Publisher
International Symposium on Low Power Electronics and Design
Citation
International Symposium on Low Power Electronics and Design 1998, August 10-12, pp.127-132
Abstract
We presen t a partial bus-in vertcoding scheme for power
optim ization of system level bus. In the proposed scheme,
we select a su b-group of bus lines in volv ed in b us enciondg
to avoid unnecessary inversion of b us lines not in the sub -
group thereby redu cing th e total n um ber of bus tran sitions.
We propose a heuristic algorithm that selects the sub-grou p
of bus lines for b us encodin g. Ex periments on benchmark
examples in dicate that the partial bus-in vert coding reduces
the tot al bus transitions b y 62.6% on the average, compared
to that of the unencoded patterns.
Language
English
URI
http://hdl.handle.net/10371/21153
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
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