Browse

Partial bus-invert coding for power optimization of system-level bus

DC Field Value Language
dc.contributor.authorShin, Youngsoo-
dc.contributor.authorChae, Soo-Ik-
dc.contributor.authorChoi, Kiyoung-
dc.date.accessioned2009-12-17T04:38:31Z-
dc.date.available2009-12-17T04:38:31Z-
dc.date.issued1998-
dc.identifier.citationInternational Symposium on Low Power Electronics and Design 1998, August 10-12, pp.127-132en
dc.identifier.urihttp://hdl.handle.net/10371/21153-
dc.description.abstractWe presen t a partial bus-in vertcoding scheme for power
optim ization of system level bus. In the proposed scheme,
we select a su b-group of bus lines in volv ed in b us enciondg
to avoid unnecessary inversion of b us lines not in the sub -
group thereby redu cing th e total n um ber of bus tran sitions.
We propose a heuristic algorithm that selects the sub-grou p
of bus lines for b us encodin g. Ex periments on benchmark
examples in dicate that the partial bus-in vert coding reduces
the tot al bus transitions b y 62.6% on the average, compared
to that of the unencoded patterns.
en
dc.description.sponsorshipThe authors would like to thank Seokjun Lee and Prof.
Wonyong Sung of Seoul National University for providing
us example patterns of an audio decoder.
en
dc.language.isoen-
dc.publisherInternational Symposium on Low Power Electronics and Designen
dc.titlePartial bus-invert coding for power optimization of system-level busen
dc.typeConference Paperen
dc.contributor.AlternativeAuthor신영수-
dc.contributor.AlternativeAuthor채수익-
dc.contributor.AlternativeAuthor최기영-
Appears in Collections:
College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
Files in This Item:
There are no files associated with this item.
  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Browse