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A fast VLSI architecture for full-search variable block size motion estimation in MPEG--4 AVC/H.264

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Authors
Kim, Minho; Hwang, Ingu; Chae, Soo-Ik
Issue Date
2005-01
Citation
Asia and South Pacific Design Automation Conference, pp.613-615
Abstract
We describe a fast VLSI architecture for full-search
motion estimation for the blocks with 7 different sizes in
MPEG-4 AVC/H.264. The proposed variable block size motion
estimation (VBSME) architecture consists of a 16x16 PE array,
an adder tree and comparators to find all 41 motion vectors and
their minimum SADs for the blocks of 16x16, 16x8, 8x16, 8x8,
8x4, 4x8 and 4x4. It employs a 2-D datapath and its control of
the search area data is simple and regular. The proposed
VBSME can achieve 100% PE utilization by employing a
preload register and a search data buffer inside each PE and
allow real-time processing of 4CIF(704x576) video with 15 fps at
100 Mhz for a search range of [-32~+31].
Language
English
URI
http://hdl.handle.net/10371/21448
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
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