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Issue Date	Title / Author(s) / Citation	File
2007-07	A 0.25-μm CMOS 1.9-GHz PHS RF Transceiver With a 150-kHz Low-IF Architecture Jeong, Hoesam; Yoo, Byoung-Joo; Han, Cheolkyu; Lee, Sang-Yoon; Lee, Kang-Yoon; Kim, Suhwan; Jeong, Deog-Kyoon; Kim, Wonchan IEEE Journal of Solid State Circuits, vol. 42, no. 6, pp. 1318-1327	DOI
2005	A 0.25um CMOS Quad-Band GSM RF Transceiver using an Efficient LO Frequency Plan Song, Eun-Seok; Lee, Deok-Hee; Chu, Sang Young; Chae, Soo-Ik; Koo, Yido; Jung, Yeon-Jae IEEE J. Solid-State Circuits, vol. 40, pp. 1094-1106	DOI
2021-09	0.37-pJ/b/dB PAM-4 Transmitter and Adaptive Receiver with Fixed Data and Threshold Levels for 12-m Automotive Camera Link Lee, Woonghee; Shim, Minkyo; Lee, Yunhee; Yang, Heejin; Ko, Han-Gon; Choi, Woo-Seok; Jeong, Deog-Kyoon ESSCIRC 2021 - IEEE 47TH EUROPEAN SOLID STATE CIRCUITS CONFERENCE (ESSCIRC), pp.475-478	DOI
2010-11	A 0.3–1.4 GHz All-Digital Fractional-N PLL With Adaptive Loop Gain Controller Kim, Deok-Soo; Song, Heesoo; Kim, Taeho; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Journal of Solid State Circuits, vol.45, no.11, pp. 2300-2311	DOI
2020-07	0.78-mW/pF/GHz, 12.5-GHz Quadrature Resonant Clock with Frequency Tuning Capacitor Yoon, Chang-Soo; Ko, Han-Gon; Kang, Byung-Jun; Sull, Jung-Woo; Jeong, Deog-Kyoon 35TH INTERNATIONAL TECHNICAL CONFERENCE ON CIRCUITS/SYSTEMS, COMPUTERS AND COMMUNICATIONS (ITC-CSCC 2020), pp.65-68
2009-11	A 1.35GHz All-Digital Fractional-N PLL with Adaptive Loop Gain Controller and Fractional Divider Kim, Deok-Soo; Song, Heesoo; Kim, Taeho; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Asian Solid-State Circuits Conference, November 16-18, 2009 / Taipei, Taiwan, pp. 161-164	view file
2024	10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area Fractional-N Digital PLL Using the Recursive-Least-Squares (RLS) Algorithm Jang, Seheon; Chae, Munjae; Park, Hangi; Hwang, Chanwoong; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.190-192	DOI
2024	10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication Technique Shin, Yuhwan; Lee, Junseok; Kim, Juyeop; Jo, Yongwoo; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp.196-198	DOI
2019-02	15 Focal Planes Head-Mounted Display using LED Array Backlight Yoo, Dongheon; Lee, Seungjae; Jo, Youngjin; Cho, Jaebum; Choi, Suyeon; Lee, Byoungho OPTICAL DESIGN CHALLENGE 2019, Vol.11040, p. 110400D	DOI
2018	153 fS<sub>RMS</sub>-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-<i>LC</i>-Hybrid Injection-Locked Clock Multiplier Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk 2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, pp.185-186
1999	A 16-bit carry-lookahead adder using reversible energy recoverylogic for ultra-low-energy systems Lim, Junho; Kim, Donggyu; Chae, Soo-Ik IEEE J. Solid-State Circuits, vol. 34, pp. 898-903	DOI
2000	A 2 GHz CMOS Double Conversion Downconverter with Robust Image Rejection Performance against the Process and Temperature Variations Song, Eun-Seok; Chae, Soo-Ik; Kim, Wonchan VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on , vol., no., pp.38-41	view file DOI
2020-12	2-D Strain Sensors Implemented on Asymmetrically Bi-Axially Pre-Strained PDMS for Selectively Switching Stretchable Light-Emitting Device Arrays Choi, Seongdae; Kim, Sangwoo; Kim, Hyunjong; Lee, Byeongmoon; Kim, Taehoon; Hong, Yongtaek IEEE Sensors Journal, Vol.20 No.24, pp.14655-14661	DOI
2004	A 2.4GHz 0.25um CMOS Dual-Mode Direct-Conversion Transceiver for Bluetooth and 802.11b Jung, Yeon-Jae; Jeong, Hoesam; Song, Eunseok; Lee, Jungho; Lee, Seung-Wook; Seo, Donghyeon; Song, Inho; Jung, Sanghun; Park, Joonbae; Jeong, Deog-Kyoon; Chae, Soo-Ik; Kim, Wonchan IEEE J. Solid-State Circuits, vol.39, pp.1185-1190	DOI
2023	28.5 A 900μW, 1-4GHz Input-Jitter-Filtering Digital-PLL-Based 25%-Duty-Cycle Quadrature-Clock Generator for Ultra-Low-Power Clock Distribution in High-Speed DRAM Interfaces Shin, Yuhwan; Jo, Yongwoo; Kim, Juyeop; Lee, Junseok; Kim, Jongwha; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2023-February, pp.408-410	DOI
2022	3D-FPIM: An Extreme Energy-Efficient DNN Acceleration System Using 3D NAND Flash-Based In-Situ PIM Unit Lee, Hunjun; Kim, Minseop; Min, Dongmoon; Kim, Joonsung; Back, Jongwon; Yoo, Honam; Lee, Jong-Ho; Kim, Jangwoo Proceedings of the Annual International Symposium on Microarchitecture, MICRO, Vol.2022-October, pp.1359-1376	DOI
2022-09	4-bit Multilevel Operation in Overshoot Suppressed Al2O3/TiOx Resistive Random-Access Memory Crossbar Array Kim, Sungjoon; Park, Jinwoo; Kim, Tae-Hyeon; Hong, Kyungho; Hwang, Yeongjin; Park, Byung-Gook; Kim, Hyungjin Advanced Intelligent Systems, Vol.4 No.9, p. 2100273	DOI
2018-07	4-Channel Push-Pull VCSEL Drivers for HDMI Active Optical Cable in 0.18-mu m CMOS Hwang, Jeongho; Choi, Hong-Seok; Do, Hyungrok; Jeong, Gyu-Seob; Koh, Daehyun; Park, Seong Ho; Jeong, Deog-Kyoon PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED '18), pp.61-66	DOI
2023	4.6 A 47fs-rms-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector and Extended Loop Bandwidth Bang, Jooeun; Kim, Jaeho; Jung, Seohee; Park, Suneui; Choi, Jaehyouk Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Vol.2023-February, pp.84-86	DOI
2010-11	A 5-Gb/s Digitally Controlled 3-Tap DFE Receiver for Serial Communications Han, Jae-Duk; Shin, Woo-Yeol; Choi, Woo-Seok; Chun, Jung-Hoon; Kim, Suhwan; Jeong, Deog-Kyoon IEEE Asian Solid-State Circuits Conference, November 8-10, 2010, Beijing, China	view file

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