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Detailed Information
Design of transceiver with digital deskew algorithm for high-speed data communication : 디지털 스큐 감소 알고리즘을 갖는 고속 데이터 통신용 송수신기의 설계
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- Authors
- Advisor
- 김원찬
- Issue Date
- 2005
- Publisher
- 서울대학교 대학원
- Keywords
- 평판 디스플레이용 송신기와 수신기 ; flat panel display (FPD) link ; LVDS ; LVDS ; UXGA ; UXGA ; 클럭 네트워크 ; clock network ; 스큐 감소알고리즘 ; deskew algorithm ; 지터 확률분포 ; jitter PDF ; DLL ; delay-locked loop (DLL) ; 주파수 판별 ; frequency detection
- Description
- Thesis(doctor`s)--서울대학교 대학원 :전기·컴퓨터공학부,2005.
- Language
- Korean
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000052347
https://hdl.handle.net/10371/45384
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