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Efficient software implementation of BCH error correction code for multi-level cell NAND flash memories

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Authors

노준례

Advisor
성원용
Issue Date
2007
Publisher
서울대학교 대학원
Keywords
BCH error correctiontable lookupmulti-bit processingflash memories
Description
학위논문(석사) --서울대학교 대학원 :전기. 컴퓨터공학부,2007.
Language
English
URI
http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000043884

https://hdl.handle.net/10371/52524
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