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BCH error correction circuits for multi-level cell NAND flash memories
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- Authors
- Advisor
- 성원용
- Issue Date
- 2006
- Publisher
- 서울대학교 대학원
- Keywords
- BCH ; BCH ; low-power ; low-power ; parallel ; parallel ; multi-level cell flash memories ; multi-level cell flash memories ; error correction code ; error correction code
- Description
- Thesis(master`s) --서울대학교 대학원 :전기. 컴퓨터공학부,2006.
- Language
- Korean
- URI
- http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000049365
https://hdl.handle.net/10371/52565
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