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BCH error correction circuits for multi-level cell NAND flash memories
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 성원용 | - |
| dc.contributor.author | 유미 | - |
| dc.date.accessioned | 2010-02-09T01:01:14Z | - |
| dc.date.available | 2010-02-09T01:01:14Z | - |
| dc.date.copyright | 2006. | - |
| dc.date.issued | 2006 | - |
| dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000049365 | kog |
| dc.identifier.uri | https://hdl.handle.net/10371/52565 | - |
| dc.description | Thesis(master`s) --서울대학교 대학원 :전기. 컴퓨터공학부,2006. | ko |
| dc.format.extent | v, 57 leaves | ko |
| dc.language.iso | ko | ko |
| dc.publisher | 서울대학교 대학원 | ko |
| dc.subject | BCH | ko |
| dc.subject | BCH | ko |
| dc.subject | low-power | ko |
| dc.subject | low-power | ko |
| dc.subject | parallel | ko |
| dc.subject | parallel | ko |
| dc.subject | multi-level cell flash memories | ko |
| dc.subject | multi-level cell flash memories | ko |
| dc.subject | error correction code | ko |
| dc.subject | error correction code | ko |
| dc.title | BCH error correction circuits for multi-level cell NAND flash memories | ko |
| dc.type | Thesis | - |
| dc.contributor.department | 전기. 컴퓨터공학부 | - |
| dc.description.degree | Master | ko |
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