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PVT Tolerant and Fast Locking 하는 ADPLL의 설계 : (A)Design of PVT tolerant fast locking ADPLL
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 정덕균 | - |
dc.contributor.author | 지한규 | - |
dc.date.accessioned | 2010-02-09T14:56:10Z | - |
dc.date.available | 2010-02-09T14:56:10Z | - |
dc.date.copyright | 2007. | - |
dc.date.issued | 2007 | - |
dc.identifier.uri | http://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000045808 | kog |
dc.identifier.uri | https://hdl.handle.net/10371/53515 | - |
dc.description | 학위논문(석사)--서울대학교 대학원 :전기·컴퓨터공학부,2007. | ko |
dc.format.extent | iv, 68 장 | ko |
dc.language.iso | ko | ko |
dc.publisher | 서울대학교 대학원 | ko |
dc.subject | ADPLL | ko |
dc.subject | FD | ko |
dc.subject | DCO | ko |
dc.subject | TDC | ko |
dc.subject | DSM | ko |
dc.title | PVT Tolerant and Fast Locking 하는 ADPLL의 설계 | ko |
dc.title.alternative | (A)Design of PVT tolerant fast locking ADPLL | ko |
dc.type | Thesis | - |
dc.contributor.department | 전기·컴퓨터공학부 | - |
dc.description.degree | Master | ko |
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