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재구성형 배열 아키텍처를 이용한 MPEG4 비디오 디코더 설계 : Design of MPEG4 video decoder using reconfigurable array architecture

DC Field Value Language
dc.contributor.advisor최기영-
dc.contributor.author손정기-
dc.date.accessioned2010-02-09T14:57:53Z-
dc.date.available2010-02-09T14:57:53Z-
dc.date.copyright2007.-
dc.date.issued2007-
dc.identifier.urihttp://dcollection.snu.ac.kr:80/jsp/common/DcLoOrgPer.jsp?sItemId=000000045777kog
dc.identifier.urihttps://hdl.handle.net/10371/53546-
dc.description학위논문(석사)--서울대학교 대학원 :전기·컴퓨터공학부,2007.ko
dc.format.extentvi, 43 장ko
dc.language.isokoko
dc.publisher서울대학교 대학원ko
dc.subject재구성형 배열 아키텍처ko
dc.subjectreconfigurable array architectureko
dc.subject재구성형 시스템ko
dc.subjectreconfigurable systemko
dc.subjectMPEG4 비디오 디코더ko
dc.subjectMPEG4 video decoderko
dc.subject시스템 온 칩ko
dc.subjectsystem-on-chipko
dc.subjecttransaction-level 시뮬레이션ko
dc.subjecttransaction-level simulationko
dc.title재구성형 배열 아키텍처를 이용한 MPEG4 비디오 디코더 설계ko
dc.title.alternativeDesign of MPEG4 video decoder using reconfigurable array architectureko
dc.typeThesis-
dc.contributor.department전기·컴퓨터공학부-
dc.description.degreeMasterko
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