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An Optimized Rendering Algorithm for Hardware Implementation of OpenVG 2D Vector Graphics : IEEE

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dc.contributor.authorCha, Kilhyung-
dc.contributor.authorKim, Daewoong-
dc.contributor.authorChae, Soo-Ik-
dc.date.accessioned2010-04-01T01:26:02Z-
dc.date.available2010-04-01T01:26:02Z-
dc.date.issued2008-11-
dc.identifier.citationInternational SoC Design Conference, Vol.1 ORAL Session pp.338-341en
dc.identifier.isbn9781424425990-
dc.identifier.urihttps://hdl.handle.net/10371/62279-
dc.description.abstractAn optimized rendering algorithm of the OpenVG 2D
vector graphics for hardware implementation is presented in this
paper. In the rendering algorithm we adopted a hybrid of raster
and vector rendering, which uses vector rendering only within
each scanline, to reduce both the number of external memory
accesses and the computational complexity. We implemented a
hardware accelerator with the proposed algorithm. Experimental
results show that our hardware accelerator can handle 11.8 fps of
Tiger image for a QVGA panel at the operating clock frequency
of 100 MHz.
en
dc.language.isoenen
dc.subjectOpenVGen
dc.subject2D Vector Graphics Hardware Acceleratoren
dc.titleAn Optimized Rendering Algorithm for Hardware Implementation of OpenVG 2D Vector Graphicsen
dc.title.alternativeIEEEen
dc.typeConference Paperen
dc.contributor.AlternativeAuthor차길형-
dc.contributor.AlternativeAuthor김대웅-
dc.contributor.AlternativeAuthor채수익-
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