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Issue Date	Title / Author(s) / Citation	File
2010	지연시간 편차를 고려한 클락 버퍼 위상 지정 기법 강민석	link
2011-02	온도 편차를 고려한 클락 버퍼 극성 지정 기법 주덕진	link
2017-04	Adjustable Delay Buffer Allocation under Useful Clock Skew Scheduling Kim, Juyeon; Kim, Taewhan IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.36 No.4, pp.641-654	DOI
2021-02	Design of Voltage and Temperature-tolerant Clock Path and Phase Error Corrector for High-Speed DRAM Interface 신소영	view file link