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High-Speed 10-bit LCD Column Driver with a Split DAC and a Class-AB Output Buffer

DC Field Value Language
dc.contributor.authorWoo, Jong-Kwan-
dc.contributor.authorShin, Dong-yong-
dc.contributor.authorJeong, Deog-Kyoon-
dc.contributor.authorKim, Suhwan-
dc.date.accessioned2010-06-14T07:51:55Z-
dc.date.available2010-06-14T07:51:55Z-
dc.date.issued2009-08-
dc.identifier.citationIEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 1431-1438en
dc.identifier.issn0098-3063-
dc.identifier.urihttps://hdl.handle.net/10371/67675-
dc.description.abstractWe propose a high-speed rail-to-rail 10-bit
column driver with a reduced die area for LCD-TV
applications. This column driver combines an 8-bit resistorstring
digital-to-analog converter (R-DAC), constructed using
a hybrid-type decoder to reduce the RC time delay and die
area, with a 2-bit interpolation DAC. In the output buffer,
error amplifiers drive a column line so as to realize a highspeed
rail-to-rail drive. Gamma-corrected output voltages are
generated by the resistor string of R-DAC, which contains
resistors of unequal values that match the inverse of the liquid
crystal transmittance-voltage characteristic. A prototype 10-
bit LCD column driver was designed and fabricated using a
0.3μm CMOS technology, and has a settling time of within
2μs and a quiescent current of 5.4μA per channel.
en
dc.language.isoenen
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)en
dc.subjectLCD driver ICen
dc.subjectDACen
dc.subjectgamma correctionen
dc.subjectclass-ABen
dc.titleHigh-Speed 10-bit LCD Column Driver with a Split DAC and a Class-AB Output Bufferen
dc.typeArticleen
dc.contributor.AlternativeAuthor우종관-
dc.contributor.AlternativeAuthor신동용-
dc.contributor.AlternativeAuthor정덕균-
dc.contributor.AlternativeAuthor김수환-
dc.identifier.doi10.1109/TCE.2009.5278010-
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