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Memory Efficient Software Synthesis with Mixed Coding Style from Dataflow Graphs
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Sung, Wonyong | - |
dc.contributor.author | Ha, Soonhoi | - |
dc.date.accessioned | 2009-08-28T04:58:21Z | - |
dc.date.available | 2009-08-28T04:58:21Z | - |
dc.date.issued | 2000-10 | - |
dc.identifier.citation | IEEE Transactions on Very Large Scale Integration Systems, Vol. 8, No. 5, pp. 522-526, 2000 | en |
dc.identifier.issn | 1063-8210 | - |
dc.identifier.uri | https://hdl.handle.net/10371/7983 | - |
dc.description.abstract | This paper presents a set of techniques to reduce the code and
data sizes for software synthesis from graphical digital signal-processing programs based on the synchronous dataflow model. By sharing the kernel code among multiple instances of a block with a shared function, we can further reduce the code size below the previous results based on inline coding style. A systematic approach also is devised to give up the single appearance schedule for reducing the data buffer requirement. The proposed techniques have been evaluated with two real-life examples to prove their significance. | en |
dc.description.sponsorship | This work was supported by the academic
fund of Ministry of Education, Republic of Korea, through the Inter- University Semiconductor Research Center, Seoul National University, under ISRC-98-E-2103. | en |
dc.language.iso | en | en |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en |
dc.subject | Code sharing | en |
dc.subject | memory requirement | en |
dc.subject | schedule adjustment | en |
dc.subject | software synthesis | en |
dc.title | Memory Efficient Software Synthesis with Mixed Coding Style from Dataflow Graphs | en |
dc.type | Article | en |
dc.contributor.AlternativeAuthor | 성원용 | - |
dc.contributor.AlternativeAuthor | 하순회 | - |
dc.identifier.doi | 10.1109/92.894156 | - |
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