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Relaxed Barrier Synchronization for the BSP Model of Computation on Message-passing Architectures

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Authors
Kim, Jin-Soo; Ha, Soonhoi; Jhon, Chu Shik
Issue Date
1998-06
Publisher
Elsevier
Citation
Information Processing Letters, Vol. 66, No. 5, pp. 247-253, 1998
Keywords
Bulk Synchronous Parallel (BSP) modelBarrier synchronizationMessage-passing architecturesParallel processing
Abstract
In this paper, we relax the barrier synchronization constraint in the BSP model for the efficient implementation on message-passing architectures. Direct implementation of the barrier synchronization does not allow any processor to proceed past the synchronization point until all processors reach that point. Instead, in our relaxed barrier synchronization, the synchronization occurs at the time of accessing non-local data only between the producer and the consumer processors, eliminating the exchange of global information.
ISSN
0020-0190
Language
English
URI
http://hdl.handle.net/10371/7991
DOI
https://doi.org/10.1016/S0020-0190(98)00061-1
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Computer Science and Engineering (컴퓨터공학부)Journal Papers (저널논문_컴퓨터공학부)
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