Publications
Detailed Information
Exploring On-Chip Bus Architectures for Multitask Applications
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Sungchan | - |
dc.contributor.author | Ha, Soonhoi | - |
dc.date.accessioned | 2009-09-07T06:23:52Z | - |
dc.date.available | 2009-09-07T06:23:52Z | - |
dc.date.issued | 2004-12 | - |
dc.identifier.citation | Journal of Semiconductor Technology and Science (JSTS), Vol. 4 No.4, pp. 286-292, 2004 | en |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.issn | http://uci.or.kr/G300-j15981657.v4n4p286 | - |
dc.identifier.uri | https://hdl.handle.net/10371/8847 | - |
dc.description.abstract | In this paper we present a static
performance estimation technique of on-chip bus architectures. The proposed technique requires the static scheduling of function blocks of a task to analyze bus conflicts caused by simultaneous accesses from processing elements to which function blocks are mapped. To apply it to multitask applications, the concurrent execution of the function blocks of different tasks also should be considered. Since tasks are scheduled independently, considering all cases of concurrency in each processing element is impractical. Therefore we make an average estimate on the effects of other tasks with respect to bus request rate and bus access time. The proposed technique was incorporated with our exploration framework for on-chip bus architectures. Its viability and efficiency are validated by a preliminary example. | en |
dc.description.sponsorship | This work was supported by National Research
Laboratory Program (number M1-0104-00-0015), Brain Korea 21 Project, and IT-SoC project. ICT at Seoul National University provided research facilities for this study. | en |
dc.language.iso | en | - |
dc.publisher | 대한전자공학회 = The Institute of Electronics Engineers of Korea | en |
dc.subject | Performance estimation | en |
dc.subject | multitask application | en |
dc.subject | on-chip bus | en |
dc.subject | design space exploration | en |
dc.subject | queuing theory | en |
dc.title | Exploring On-Chip Bus Architectures for Multitask Applications | en |
dc.type | Article | en |
dc.contributor.AlternativeAuthor | 김성찬 | - |
dc.contributor.AlternativeAuthor | 하순회 | - |
- Appears in Collections:
- Files in This Item:
Item View & Download Count
Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.