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Integrated amplifiers using fully ion-implanted InP JFETs with high transconductance
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Sung June | - |
| dc.contributor.author | Guth, G. | - |
| dc.contributor.author | Vella-Coleiro, G. | - |
| dc.date.accessioned | 2009-09-08 | - |
| dc.date.available | 2009-09-08 | - |
| dc.date.issued | 1988-06 | - |
| dc.identifier.citation | IEEE Electron Device Lett., vol. 9, pp. 306-308, June 1988 | en |
| dc.identifier.issn | 0741-3106 | - |
| dc.identifier.uri | https://hdl.handle.net/10371/8879 | - |
| dc.description.abstract | Monolithically integrated amplifiers have been fabricated
on indium phosphide (InP) using fully ion-implanted JFETs. The FETs have a gate length of 1.5 pm and a maximum transconductance of 110 mS/mm, the highest ever reported for ion-implanted InP JFETs. The amplifiers utilized both a conventional direct-coupled design as well as a new symmetrical design. The conventional direct-coupled amplifier shows a maximum gain of 8 (18 dB) while the symmetrical amplifier design exhibits the same gain without dc offset regardless of the FET threshold voltage and the power supply voltage used. | en |
| dc.description.sponsorship | The authors would like to thank K. OBrien and Y. Ota for
dielectric depositions, D. Ingersoll for help in processing, D. Faber for help in layout of test patterns, and s. Singh and B. Santana for Hall mobility measurements. | en |
| dc.language.iso | en | - |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en |
| dc.title | Integrated amplifiers using fully ion-implanted InP JFETs with high transconductance | en |
| dc.type | Article | en |
| dc.contributor.AlternativeAuthor | 김성준 | - |
| dc.identifier.doi | 10.1109/55.725 | - |
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