A HIGH-THROUGHPUT PROCESS AND LOW-NOISE STRUCTURE FOR SILICON NEURAL PROBE

Abstract

This paper focuses on the design and fabrication of the silicon neural probe with two improvements: the design of process for improvement in fabrication yield and the integration of ground layer for reduction of electromagnetic noise. First, we have found that fabrication yield is determined by wet-etch step for bulk micromachining on back side of wafer. In order to improvement of yield, a design of mask is modified that all probes are linked by micro tab located between probes and bars on the wafer. The micro tab is used to hold probes on wafer during wet-etch. Second, the main advantage of the internal ground layer located below conduction line contributes dramatic reduction of electromagnetic noise. To evaluate improvement due to the use of internal grounding at electrode level, we measured power spectral density (PSD) of noise in recorded signal. The noise PSD is reduced from -45dB to -100dB at 120Hz that one of frequencies came from external noises. These improvements will contribute to development on advanced neuroprosthetic devices using silicon neural probe.