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A STUDY ON HIGH PERFORMANCE MILLIMETER-WAVE POWER AMPLIFIER INTEGRATED CIRCIUTS USING SERIES-CONNECTED FET STUCTURES

DC Field Value Language
dc.contributor.advisor권영우-
dc.contributor.author김영민-
dc.date.accessioned2017-07-13T06:55:54Z-
dc.date.available2017-07-13T06:55:54Z-
dc.date.issued2012-08-
dc.identifier.other000000005375-
dc.identifier.urihttps://hdl.handle.net/10371/118876-
dc.description학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2012. 8. 권영우.-
dc.description.abstractThe Series-connected FET structures are very useful method for various applications due to its output-voltage adding mechanism, each partial stacked-FET having the active load as followed CG-FET, and additional control bias from each CG-FET's gate bias.
Series power combining using stacked transistors for power amplifier application is a promising power combining method due to the its broadband output power performance, higher power-cell gain and easy integration with other power combining method such as parallel combining and DAT (distributed active transformer) combining as power cell [1]-[6]. Moreover, as the voltage combining method, stacked-FET architecture could be a better solution to transistors with low breakdown voltage. However, the implementation of series-combined amplifiers has been limited mostly to low frequencies due to the design difficulties and the voltage swing from each transistor to show different phases at high frequencies caused by the pronounced non-ignorable reactive effects of the transistors, resulting in out-of-phase voltage combining and optimum load mismatch of each transistor [1]-[6]. Different from the low frequency design method of stacked-FET structure, the optimum load impedances of stacked-FET are complex form. Moreover, the load impedance of preceding partial stacked structure is affected by subsequent CG-FET's load impedance due to its output capacitance at millimeter-wave frequency. Therefore, at millimeter-wave stacked-FET power amplifier, it is very difficult to make each FET's load impedance be close to a anticipated optimum point. Moreover, there are the natural limitations of stacked-FET power amplifier existent at millimeter wave. Besides the effect from voltage phase misalignment of each transistors, the output power can't help being lowered than simply estimated output power, since the load impedance levels at the intermediate drain node of each FET could not be a expected optimum point at millimeter-wave frequency
In this thesis, series power combining by developing design methodology suitable for millimeter-waves frequencies is demonstrated [9]. In addition, for millimeter-wave operations, the limitations of series-connected FET structure have been analyzed: output power degradation with regard to operating frequency, increasing FET-stacking number, unit-FET's gate-periphery, and unit-FET's specific parameters : gate-to-source capacitance (Cgs), and transconductance (gm). To validate the power degradation of mm-wave stacked-FET PA, stacked-FET PA MMICs are designed and fabricated with various operating frequency (20 GHz, 40 GHz, and 60 GHz) and various FET device (mHEMT, pHEMT, and CMOS). Moreover, the novel solution against phenomenon of its output-power degradation at millimeter-waver stacked-FET power amplifier is also presented. The developed stacked-FET structure is applied to 77 GHz radar transceiver as power amplifier. The 77 GHz radar transceiver is fully integrated with 77 GHz frequency tripler, 77 GHz receiver with low-noise amplifier and direct conversion mixer, and 77 GHz cascode-FET power amplifier which shows output power of 17 dBm suitable for FMCW car-collision avoidance radar.
Beside the power amplifier application of series-connected FET structure, it is also used for application of millimeter-wave variable-gain low-noise amplifier. Different from the conventional cascode-FET variable-gain amplifier, the novel method for minimizing transfer-phase variation at overall gain dynamic range is developed.
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dc.description.tableofcontentsContents
Abstract i
Contents iv
List of Figures viii
List of Tables xviii
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Outline of This Thesis 4
Chapter 2 Millimeter-wave Power Amplifier Integrated
Circuits using Series-Connected FET Structure 5
2.1 Introduction 5
2.2 Theory I : Analysis Method for Millimeter-wave Power
Amplifier Using Stacked-FET Structure 10
2.3 Theory II : Limitations of Millimeter-wave Power Amplifier
Using Stacked-FET Structure 18
2.3.1 FET-Stacking Number Limitation and Decreasing
Output Power Bandwidth of Stacked-FET Power
Amplifier 18
2.3.2 Operating Frequency Limitation of Stacked-FET
Power Amplifier 23
2.3.3 Output Power Degradation as Unit-FET Size of
Stacked- FET Power Amplifier 25
2.4 Theory III : Output Power Degradation According to FET's Intrinsic Parameters and Solution of MillimeterWave Stacked-FET Power Amplifier 28
2.4.1 Output Power Degradation with regard to FET
Parameters 28
2.4.2 Solution against Output Power Degradation of
Millimeter-wave Stacked-FET Power Amplifier 33
2.5 Measurement Results : Millimeter-wave Stacked-FET Power
Amplifier MMICs for Verifying The Analysis 35
2.5.1 Specific Design Flow of 60 GHz Stacked-FET Power
Amplifier MMIC with Considering Output Power
Degradation 35
2.5.2 GaAs-based Stacked-FET Power Amplifier MMICs
at Different Operation Frequencies 48
2.5.3 Si-based Stacked-FET Power Amplifier MMICs
at Different Operation Frequencies 65
2.5.4 Improved GaAs-based Stacked-FET Power Amplifier MMICs with Effective Cgs Reduction 72
2.5.5 Improved Si-based Stacked-FET Power Amplifier MMICs with Effective Cgs Reduction 81
2.6 Conclusion 96
Chapter 3 77 GHz FMCW Radar Transceiver MMIC
with Cascode-FET PA and 60 GHz Cascode
Variable-gain Low Noise Amplifier 98
3.1 77 GHz FMCW Radar Transceiver MMIC with Cascode-
FET Power Amplifier 98
3.1.1 Motivation 98
3.1.2 130 nm mHEMT Technology 100
3.1.3 MMIC Design and Measurement Results 103
3.1.3 Conclusion 116
3.2 60 GHz Cascode Variable Gain Low Noise Amplifier with
Phase Compensation 117
3.2.1 Introduction 117
3.2.2 MMIC Design 118
3.2.3 Measurement Results 126
3.2.4 Conclusion 132
Chapter 4 Conclusions 133
Bibliography 135
Abstract in Korean 142
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dc.formatapplication/pdf-
dc.format.extent2436419 bytes-
dc.format.mediumapplication/pdf-
dc.language.isoen-
dc.publisher서울대학교 대학원-
dc.subjectMillimeter-wave-
dc.subjectStacked-FET-
dc.subjectPower amplifier-
dc.subjectFMCW Radar transceiver-
dc.subjectvariable-gain low-noise amplifier-
dc.titleA STUDY ON HIGH PERFORMANCE MILLIMETER-WAVE POWER AMPLIFIER INTEGRATED CIRCIUTS USING SERIES-CONNECTED FET STUCTURES-
dc.typeThesis-
dc.description.degreeDoctor-
dc.citation.pages144-
dc.contributor.affiliation공과대학 전기·컴퓨터공학부-
dc.date.awarded2012-08-
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