Vertical Tunnel Field-Effect Transistors with Tunnel-Direction Perpendicular to the Channel for Low Power Operation

Abstract

In this work, Tunnel Field-Effect Transistors (TFETs) with a novel structure will be proposed as a substituting devices which can implement steeper switching than the conventional MOSFETs do in low power operation. It is experimentally demonstrated that applying a vertical structure with a perpendicular tunnel to the channel can achieve an operation of high electrical performance and it can be integrated in a bulk Si substrate. First of all, Si and SiGe TFETs with a planar structure are fabricated and measured to extract model parameters. From the measured results, the parameters of band-to-band tunnel (BTBT) model, which can be used to simulate TFETs accurate are calibrated. In this regard, Synopsys Sentaurus Device will be used for this purpose. Then, based on the simulation of planar TFETs, the proposed devices will be presented as the vertical TFETs with the perpendicular tunnel junction based on the bulk Si substrate. The perpendicular tunnel junction and the large tunnel area are employed on the source side to achieve a steep subthreshold swing (SS) and high ON-current (ION), which can lead to TFETs outstanding performance. Moreover, the ION can be increased easily by adjusting a height of overlap region between a source and a gate. Although, the TFETs show good electrical performance, there is a hump phenomenon in transfer curve. In order to suppress the hump phenomenon in the transfer curves, the hump behavior in the proposed device should be investigated. After investigating it, the hump behavior is found to be originated from the two different tunnel regions. Moreover their threshold voltages originated from different tunnel show different values. In order to improve the electrical performance, a capping layer which can be made by gradual doping is inserted on the source. Then, the hump behavior can be expected to decrease. Finally, the proposed TFETs will be fabricated on the bulk Si substrate. A thin intrinsic Si is epitaxially grown on the source region which forms the perpendicular tunnel junction to the channel, resulting in abrupt band bending. The fabricated the proposed TFETs show 17 mV/dec minimum subthreshold swing (SS) and 104 ON/OFF current ratio (ION/IOFF ) for sub-0.7 V gate overdrive. In addition, SS is maintained less than 60 mV/dec while a drain current increases from complete OFF-state (10−13) to more than two orders of magnitude (10−11). In conclusion, the proposed device are fabricated successfully. From this study, it is demonstrated that the proposed TFETs will be one of the most promising candidate for a next-generation low-power device.