A CMOS RF Power Amplifier with Integrated Phase Linearizer for LTE-Advanced Applications

Abstract

In this thesis, a linearization technique of CMOS RF power amplifier (PA) in stacked-FET structure is developed for wideband long term evolution-advanced (LTE-A) applications. Demand for watt-level output power in modern handset PA, CMOS PA should overcome breakdown voltage problem. Stacked-FET structure PA is adopted to overcome breakdown voltage problem where three transistors are connected in series. The measured PA achieves maximum power added efficiency (PAE) of 62.2%, a saturated output power of 30.3 dBm, and a power gain of 31 dB when using 837-MHz continuous wave (CW) test with 4 V supply. Non-linearities in CMOS RF PA are critical issue for mobile applications. Unlike the HBT cases, the CMOS PA suffers from significant amplitude modulation to phase modulation (AM-PM) distortion caused by CMOS non-linear intrinsic capacitors (Cgd, Cgs). Phase distortion in stacked-FET structure is analyzed by plotting the variation of non-linear intrinsic capacitors in SOI CMOS technology. The non-linear capacitors in SOI CMOS technology are extracted by on-wafer measurement. Two different solutions to overcome non-linearities in CMOS RF PA are proposed by presenting gate bias control linearizer and phase predistortion linearizer. The measured carrier aggregation evolved universal terrestrial radio access adjacent channel leakage ratios (CA E-UTRAACLRS) is improved from -28.8 dBc to -36.1 dBc after phase compensation at 24 dBm output power when PA was tested with 40-MHz bandwidth (BW) intra-band contiguous carrier aggregation (CA) LTE-A signal.