A Study on High Efficiency High Voltage Envelope Tracking RF Power Amplifier

Abstract

In this dissertation, two advanced techniques to solve system issues in envelope tracking power amplifier (ET PA) is presented. First of all, a two-stage broadband CMOS stacked FET RF power amplifier (PA) with a reconfigurable interstage matching network is developed for wideband envelope tracking (ET). The proposed RF PA is designed based on Class-J mode of operation, where the output matching is realizedwith a two-section low-pass matching network. To overcome the bandwidth (BW) limitation from the high- interstage impedance, a reconfigurable matching network is proposed, allowing a triple frequency mode of operation using two RF switches. The proposed RF PA is fabricated in a 0.32-μm silicon-on-insulator CMOS process and shows continuous wave (CW) power-added efficiencies (PAEs) higher than 60% from 0.65 to 1.03 GHz with a peak PAE of 69.2% at 0.85 GHz. The complete ET PA system performance is demonstrated using the envelope amplifier fabricated on the same process. When measured using a 20-MHz BW long-term evolution signal, the overall system PAE of the ET PA is higher than 40% from 0.65 to 0.97 GHz while evolved universal terrestrial radio access (E-UTRA) adjacent channel leakage ratios (ACLRs) are better than –33 dBc across the entire BW after memoryless digital pre-distortion. To our knowledge, this study represents the highest overall system performance in terms of PAE and BW among the published broadband ET PAs, including GaAs HBT and SiGe BiCMOS. Second, a high-efficiency gallium-nitride (GaN) envelope amplifier (EA) is developed using class-E2 architecture for wideband LTE applications. The proposed EA consists of a class-E2 resonant converter which output voltage is controlled by a frequency modulator. With a pulse frequency modulation (PFM) signal, the output of the converter can achieve a linear response to the input wideband envelope signal. The frequency modulator with a cross-coupled oscillator and a driver using stacked-FETs structure is fabricated using 0.28-μm SOI CMOS process. The class-E2 converter and PA have been implemented using a commercial GaN device. The envelope amplifier (EA) achieves 74.7% efficiency into a 50 Ω load for a 20-MHz BW LTE signal with a 7.5 dB peak-to-average power ratio (PAPR) and there is no efficiency degradation as the LTE signal bandwidth increases to 160-MHz. The ET transmitter system demonstrated using the CMOS and GaN shows an overall system efficiency of 47.4% at 35.4 dBm with 20-MHz BW LTE signal centered at 3.5 GHz. The measured E-UTRA ACLR of ET PA is –33.8 dBc at 34.4 dBm output power before linearization and –42.9 dBc at the same output power after memory digital pre-destination (DPD). When tested using 80-MHz BW LTE signal, the overall system PAE reaches 46.5% at 35.3 dBm output power and E-UTRA ACLR was measured by –31.5 dBc at 34.4 dBm output power. A wideband performance is characterized using various bandwidth LTE signals which shows only 2.3 dB ACLR degradation without PAE degradation as the signal bandwidth is increased from 20- to 80-MHz. The proposed method is a first demonstration of GaN EA cover 160-MHz BW LTE signals and overcomes the efficiency degradation of the conventional EA as the signal bandwidth increase.