Electrical Characteristics and Bias Reliability of Nanocrystalline Silicon TFTs and Amorphous Oxide TFTs

Abstract

Flat panel display technology has grown rapidly along with progress of high performance thin film transistor (TFT). Recent demands of flat panel display, such as active matrix liquid crystal display (AMLCD) and active matrix organic light emitting diode (AMOLED), are large size, high resolution and fast refreshing rate. TFT, driving device of active matrix display, plays a key role to fulfill the requirements. To achieve large area display, good uniformity, such as mobility and threshold voltage (VTH) is desired. High electrical capability is essential to operate active matrix display with fast refreshing. Also, to operate current driving device, such as AMOLED, high mobility TFT is critical issue. Thus, it is necessary for TFT to have good uniformity and high electrical ability. Another issue on TFT is reliability. During operation of active matrix display, TFT can be degraded due to various factors such as, bias stress, illumination, temperature, and ambient, resulting in VTH shift or mobility decreasing. Conventional amorphous silicon (a-Si) TFT has good uniformity, yet severely degraded under bias and illumination. Also low field effect mobility (< 1 cm2/Vsec) is limitation in realization of the high resolution display Another conventional device, low temperature polycrystalline silicon (poly-Si) TFT exhibit rather high mobility (20 cm2/Vsec), enabling fast switching required for high-resolution image with reduced device size. However, random distribution of grain boundaries would cause the non-uniformity of the field effect mobility as well as the threshold voltage of the poly-Si TFT. Nanocrystalline silicon (nc-Si) TFT and amorphous oxide-based TFT gain considerable amount attention over conventional TFTs, since those devices exhibit better mobility even without troublesome recrystallization process. And potentially good reliability can be obtained due to their material nature, which is as-deposit crystalline phase of nc-Si and ionic bonding structure of oxide semiconductor. In this thesis, two TFT devices, nc-Si TFT and amorphous oxide-based TFT are presented and the reliability of those devices is discussed. It was fabricated nc-Si TFT of a top gate structure, without any substrate heating. High quality nc-Si film and silicon dioxide film were deposited at room temperature employing an ICP-CVD system. For nc-Si film, crystalline phase were grown as a columnar structure and the crystalline volume fraction was 27%. On silicon dioxide film, hydrogen plasma post-treatment was performed, and the electrical characteristics of silicon dioxide film were improved due to charge reduction and the annealing effect. The nc-Si film and the silicon dioxide film were used for the fabrication of nc-Si TFTs without substrate heating. Although there was no external heating, a mobility of 7.93 cm2/V∙sec was achieved. This result indicates that nc-Si TFTs fabricated without any substrate heating may be a suitable device for a flexible display. Also, bottom-gate nc-Si TFTs were fabricated and evaluated their characteristics and electrical stability under various stress condition. nc-Si with high crystallinity was deposited employing Inductively coupled plasma chemical vapor deposition(ICP-CVD) system. I employed helium gas diluted deposition and all the process temperature was kept under 350oC. I fabricated conventional inverted-staggered nc-Si TFTs. Fabricated nc-Si TFTs showed fine electrical characteristics, such as electrical mobility of 0.64~0.77 cm2/V∙sec. I investigated its stability through constant-voltage stress and constant-current stress. The threshold voltage shift after 30,000 seconds gate bias (10V) stress was only 0.098V, which is considerably less compared to a-Si TFT. Under the static current stress condition, the threshold voltage of the nc-Si TFT was shifted less than that of a-Si TFT. It demonstrates that nc-Si TFT exhibit better stability than conventional a-Si TFT. After that, I examined electrical stability of nc-Si TFT under drain bias stress. After 30,000sec stress, as the bias at the drain terminal increases while gate bias is fixed, VTH shift of the nc-Si TFT decreases significantly. Also, under the drain bias stress, VTH shift decreased as channel length reduced. Smaller VTH shift of the nc-Si TFTs is related with the concentration of the channel charge varying with the drain bias. High drain bias decreases carrier concentration in the channel near drain terminal. Also, ratio of the depleted charges over total charges increases with reducing channel length due to the drain bias. Thus, the short channel TFT has the smaller normalized channel charge than the long channel TFTs. Less carrier concentration induces less defect states, so VTH shift of a short channel TFT is smaller than that of a long channel TFT. For amorphous oxide-based TFT, I have employed hafnium indium zinc-oxide (HIZO) and indium gallium zinc-oxide (IGZO) as the channel layer. It was investigated the channel layer thickness dependency on the characteristics and stability in amorphous HIZO TFTs. HIZO TFTs were prepared with various channel thicknesses from 400Å to 700Å. In HIZO TFTs, carrier concentration is considerably high, which leads to channel layer thickness dependency. The threshold voltages of TFTs were negatively shifted as the channel thickness increased. The threshold voltage shift at a high temperature is more severe in TFTs with thicker channel layers. Channel thickness dependency on bias stability of HIZO TFTs is closely related to the back interface, rather than bulk state. For the improvement of reliability, effect of hydrogen content on the characteristics and the reliability of HIZO TFT were investigated. I proposed a thermal treatment on SiO2 gate insulator prior to deposition of a HIZO, in order to suppress hydrogen diffusion from gate insulator into active layer. Secondary-ion mass spectroscopy analysis confirms that the hydrogen content in the active layer was successfully decreased through thermal treatment. Threshold voltage shift of HIZO TFT under bias stress (VG = 20 V, 1000 s) employing a 400°C thermal treatment was suppressed to 0.6 V, whereas that of TFT without thermal treatment was 1.4 V. It was also investigated the effect of temperature on bias-stability of IGZO TFT. In the atmosphere, VTH of IGZO TFT is considerably decreased with increased temperature due to the donor molecules effect, such as moisture and hydrogen. Under bias stress, VTH degradation is enhanced in the atmosphere compared to in a vacuum, due to adsorption of ambient gas. Also, VTH degradation is enhanced at high temperatures. However, in a vacuum, VTH shift under positive bias stress does not depend on temperature, because thermal energy enhances not only electron trapping, but also induces an adsorption of oxygen simultaneously. Lastly, the effect of moisture on the characteristic and reliability of the IGZO TFT was examined. Moisture adsorption of the IGZO creates a large number of additional localized states in the band gap, and increases the interfacial states at the back interface. Under positive bias stress, IGZO TFT under humid atmosphere shows better stability than normal atmosphere. Stable characteristic at humid atmosphere may be attributed to the effect of EF pinning. On the contrary, under negative bias stress, IGZO TFT under normal atmosphere shows better stability than normal atmosphere due to adsorption of H2O molecule by negative electric field. The experimental results demonstrate that environmental effect such as moisture, oxygen, temperature can have a profound impact on the reliability of the oxide TFT under bias stressing and, robust passivation property is required for the stable characteristic of the oxide TFT.