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A 0.1 1.62-to-10.8Gb/s Video interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level
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Cited 0 time in Scopus
- Authors
- Issue Date
- 2019-06
- Publisher
- IEEE
- Citation
- 2019 SYMPOSIUM ON VLSI CIRCUITS, pp.C198-C199
- Abstract
- This paper presents a 65nm CMOS 1.624o -10.8(112/s video interface receiver with fully adaptive equalizers incorporating CTLE and 2 -tap DEE, Sign-sign least -mean-squares (SSLMS) algorithm is used for not only the DFE but also the CTLE adaptation to reduce power consumption and extra hardware. An un-even data level is proposed for the optimum locking of the adaptation in the presence of a pre cursor. The receiver achieves BER of 10-12 at 34dB loss channel, occupies 0.174mm2, and consumes 37.2mW at 10.8Gb/s.
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