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A 48-Gb/s Single-Ended PAM-4 Receiver with Adaptive Nonlinearity Compensation

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Authors

Kim, Kahyun; Yun, Daeho; Baek, Kyungmin; Choi, Woo-Seok; Jeong, Deog-Kyoon

Issue Date
2023-05
Publisher
IEEE International Symposium on Circuits and Systems proceedings
Citation
IEEE International Symposium on Circuits and Systems proceedings, Vol.2023-May, p. 190917
Abstract
This paper presents a 48-Gb/s single-ended PAM4 receiver (RX) with an adaptive nonlinearity compensating equalizer. The receiver incorporates 3 parallel Cherry-Hooper continuous-time linear equalizers (CTLEs) and a 1-tap 9-coefficient adaptive decision feedback equalizer (DFE). CTLEs provide a variable gain with offset-canceling calibration. The DFE detects the level separation mismatch ratio (RLM) of the transmitted data and nonlinear distortion within the receiver analog front-end (AFE). The nonlinearity is compensated by simultaneously adapting 9 coefficients of the nonlinearity compensator. The proposed RX is fabricated in the 40nm CMOS technology, occupying 0.236 mm(2). Measured in a 7-dB loss channel, the RX achieves a BER of less than 10-12 and energy efficiency of 2.97 pJ/b.
ISSN
0271-4302
URI
https://hdl.handle.net/10371/202454
DOI
https://doi.org/10.1109/ISCAS46773.2023.10182132
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