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Simulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulation

Cited 14 time in Web of Science Cited 20 time in Scopus
Authors
Han, Sang-Il; Chae, Soo-Ik; Brisolara, Lisane; Carro, Luigi; Popovici, Katalin; Guerin, Xavier; Jerraya, Ahmed A.; Huang, Kai; Li, Lei; Yan, Xiaolang
Issue Date
2009
Publisher
Elsevier
Citation
Integration, the VLSI Journal 42 pp.227-245
Keywords
Application to architecture mappingCodesignDesign space explorationMemory optimizationMultiprocessor system-on-chipSimulationSimulinkSystem specification
Abstract
As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.
ISSN
0167-9260
Language
English
URI
https://hdl.handle.net/10371/21096
DOI
https://doi.org/10.1016/j.vlsi.2008.08.003
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Journal Papers (저널논문_전기·정보공학부)
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