S-Space College of Engineering/Engineering Practice School (공과대학/대학원) Dept. of Electrical and Computer Engineering (전기·정보공학부) Journal Papers (저널논문_전기·정보공학부)
Simulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulation
- Han, Sang-Il; Chae, Soo-Ik; Brisolara, Lisane; Carro, Luigi; Popovici, Katalin; Guerin, Xavier; Jerraya, Ahmed A.; Huang, Kai; Li, Lei; Yan, Xiaolang
- Issue Date
- Integration, the VLSI Journal 42 pp.227-245
- Application to architecture mapping; Codesign; Design space exploration; Memory optimization; Multiprocessor system-on-chip; Simulation; Simulink; System specification
- As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.
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