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Simulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulation

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dc.contributor.authorHan, Sang-Il-
dc.contributor.authorChae, Soo-Ik-
dc.contributor.authorBrisolara, Lisane-
dc.contributor.authorCarro, Luigi-
dc.contributor.authorPopovici, Katalin-
dc.contributor.authorGuerin, Xavier-
dc.contributor.authorJerraya, Ahmed A.-
dc.contributor.authorHuang, Kai-
dc.contributor.authorLi, Lei-
dc.contributor.authorYan, Xiaolang-
dc.date.accessioned2009-12-17T02:24:38Z-
dc.date.available2009-12-17T02:24:38Z-
dc.date.issued2009-
dc.identifier.citationIntegration, the VLSI Journal 42 pp.227-245en
dc.identifier.issn0167-9260-
dc.identifier.urihttps://hdl.handle.net/10371/21096-
dc.description.abstractAs a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.en
dc.language.isoen-
dc.publisherElsevieren
dc.subjectApplication to architecture mappingen
dc.subjectCodesignen
dc.subjectDesign space explorationen
dc.subjectMemory optimizationen
dc.subjectMultiprocessor system-on-chipen
dc.subjectSimulationen
dc.subjectSimulinken
dc.subjectSystem specificationen
dc.titleSimulink(R)-based heterogeneous multiprocessor SoC design flow for mixed Hardware/Software refinement and Simulationen
dc.typeArticleen
dc.contributor.AlternativeAuthor한상일-
dc.contributor.AlternativeAuthor채수익-
dc.identifier.doi10.1016/j.vlsi.2008.08.003-
Appears in Collections:
College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Journal Papers (저널논문_전기·정보공학부)
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