Publications
Detailed Information
Reversible energy recovery logic circuit without non-adiabatic energy loss
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lim, Junho | - |
dc.contributor.author | Kwon, Kipaek | - |
dc.contributor.author | Chae, Soo-Ik | - |
dc.date.accessioned | 2009-12-17T05:46:51Z | - |
dc.date.available | 2009-12-17T05:46:51Z | - |
dc.date.issued | 1998 | - |
dc.identifier.citation | Electronics Letters- IEE, 1998, vol. 34, pp.344-346. | en |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | https://hdl.handle.net/10371/21262 | - |
dc.description.abstract | The authors propose a reversible energy recovery logic (RERL)
circuit for ultra-low-energy consumption, whch consumes only adiabatic energy loss and leakage current loss by completely eliminating non-adiabatic energy loss. It is a dual-rail adiabatic circuit using the concept of reversible logic with a new eight-phase clocking scheme. Simulation results show that at low-speed operation, the RERL consumes much less energy than the complementary static CMOS circuit and other adiabatic logic circuits. | en |
dc.language.iso | en | - |
dc.publisher | Institution of Engineering and Technology | en |
dc.title | Reversible energy recovery logic circuit without non-adiabatic energy loss | en |
dc.type | Article | en |
dc.contributor.AlternativeAuthor | 임준호 | - |
dc.contributor.AlternativeAuthor | 권기백 | - |
dc.contributor.AlternativeAuthor | 채수익 | - |
dc.identifier.doi | 10.1049/el:19980261 | - |
- Appears in Collections:
- Files in This Item:
- There are no files associated with this item.
Item View & Download Count
Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.