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부 벡터 군집화를 통한 FPGA기반 음성 인식기의 수행 속도 향상 : Execution Speed Improvement of FPGA-based Speech Recognizer using Sub-vector Clustering

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dc.contributor.author최정욱-
dc.contributor.author성원용-
dc.date.accessioned2009-08-05T05:40:35Z-
dc.date.available2009-08-05T05:40:35Z-
dc.date.issued2009-07-
dc.identifier.citation대한전자공학회 2009년 하계종합학술대회 2009. 7en
dc.identifier.urihttp://www.ieek.or.kr-
dc.identifier.urihttps://hdl.handle.net/10371/6169-
dc.description.abstractReducing the memory bandwidth is very critical for real-time implementation of a large vocabulary speech recognizer. In this paper, we implemented sub-vector clustering algorithm in hardware to alleviate the problem of much extreme memory access. The experimental result shows that this implementation accelerates acoustic likelihood computation twice faster, and increases the speed of overall recognition by 22%.en
dc.description.sponsorship이 논문은 지식경제부 출연금으로 ETRI와 시스템반도체산업진흥센터에서 수행한 ITSoC 핵심설계인력양성사업과 교육과학기술부의 재원으로 한국학술진흥재단에서 수행하는 BK21 프로젝트의 지원을 받아 수행된 연구입니다.en
dc.language.isokoen
dc.publisher대한전자공학회 = The Institute of Electronics Engineers of Koreaen
dc.title부 벡터 군집화를 통한 FPGA기반 음성 인식기의 수행 속도 향상en
dc.title.alternativeExecution Speed Improvement of FPGA-based Speech Recognizer using Sub-vector Clusteringen
dc.typeConference Paperen
dc.contributor.AlternativeAuthorChoi, JungWook-
dc.contributor.AlternativeAuthorSung, Wonyong-
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