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Implementation of an OpenVG Rasterizer with Configurable Anti-aliasing and Multi-window Scissoring

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Authors
Huang, Ren; Chae, Soo-Ik
Issue Date
2006-09
Citation
IEEE International Conference on Computer and Information Technology, pages 179-184
Abstract
This paper describes an OpenVG-compliant hardware
rasterizer with configurable anti-aliasing and multi-window
scissoring. This rasterizer requires 129K logic gates with
2KB on-chip SRAM and provides satisfactory image quality
with a reasonable rasterizer speed at the operational
frequency of 100MHz. In this paper, we propose an optimized
scanline algorithm, which provides better performance
than the conventional scanline algorithm with supersampline
while maintaining the flexibility and the hardware
simplicity. We also propose a fast LUT-based scissoring algorithm,
which has zero-latency in most of the cases. The
hardware implementation of this rasterizer is explained in
detail.
Language
English
URI
https://hdl.handle.net/10371/62265
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College of Engineering/Engineering Practice School (공과대학/대학원)Dept. of Electrical and Computer Engineering (전기·정보공학부)Others_전기·정보공학부
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