Publications
Detailed Information
Hardware implementation of inter-processor communication in MPSoCs for multimedia applications
Cited 0 time in
Web of Science
Cited 0 time in Scopus
- Authors
- Issue Date
- 2007-07
- Citation
- International Technical Conference on Circuits/Systems, Computers and Communications
- Abstract
- In this paper we present a scalable and flexible architecture
that implements inter-processor communication (IPC) synchronization
among FIFO channels for multimedia applications. We also compare it
to the simple mail-box architecture, especially for tasks of finer
granularity. With experimental results we confirmed the proposed
architecture is suitable for various cases including a Motion JPEG
example.
- Language
- English
- Files in This Item:
Item View & Download Count
Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.