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1D1R (1diode and 1resistor) crossbar type device using TiO2 thin film for next generation non-volatile resistive switching random access memory application

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dc.contributor.advisor황철성-
dc.contributor.author김건환-
dc.date.accessioned2017-07-13T05:35:03Z-
dc.date.available2017-07-13T05:35:03Z-
dc.date.issued2012-08-
dc.identifier.other000000003232-
dc.identifier.urihttps://hdl.handle.net/10371/117874-
dc.description학위논문 (박사)-- 서울대학교 대학원 : 재료공학부, 2012. 8. 황철성.-
dc.description.abstractResistive switching random access memory (ReRAM) and its application to crossbar array (CA) were investigated. The two essential components of CA are memory and selection element. For the realization of CA that utilizes the ReRAM, there are several obstacles to overcome, such as enhancing the reliability of memory element and developing suitable selection element to improving random access ability in writing and reading operations. For these objectives, in this thesis, it was revealed that hourglass shaped conducting filament (HSCF) and minimization of interconnection line resistance in CA are essential for improving reliability of resistive switching (RS) cell itself and stable operation in CA. In addition, for developing selection device, a theoretical model was proposed to estimate the electrical specification of selection device according to integration density of CA. Subsequently, the chemical optimization of Schottky type diode (SD) was provided. The experimental results showed that the optimized chemical structure in SD is important for fabricating SD with desired electrical specification. And then, crossbar type SD devices were fabricated and characterized, which showed promising high rectifying ratio and high forward current density for highly integrated CA device. Finally, 1D1R (1diode+1resistor) stacked capacitor-like and CA devices were fabricated and characterized.
In the part of improving reliability of RS memory, a modified biasing scheme was adopted to improve the electrical endurance characteristics of conducting filamentary RS in a Pt/TiO2/Pt RS cell. The modified bias scheme included the application of bias voltages with alternating polarity, even though RS proceeds in non-polar mode, which results in the stable distribution of each resistance states as well as improved endurance. This was attributed to the minimized consumption of oxygen ions in the TiO2 film, which can be induced by the formation of hourglass-shaped conducting filament (HSCF). The presence of a HSCF was confirmed by high-resolution transmission electron microscopy.
Besides the improving the reliability of RS cell itself, there is additional crucial issue related to the stable RS operation, especially in writing process, when the RS cell is applied to CA. The effects of the external load resistance on the RS behavior of Pt/TiO2/Pt RS cells were examined using model calculations and experiments. With increasing load resistance, the reset voltage increased more rapidly than the set voltage, which eventually resulted in RS failure. For the experiment, various electrode materials were examined to achieve both stable RS behavior of a TiO2 film and a CA with sufficiently low line resistance. The effect of the interconnection line resistance on the RS behavior was studied from the electrical characterization of the fabricated CA. A high interconnection line resistance causes an undesirable high operation voltage and the failure of stable RS in extreme cases. Overall, a sufficiently low interconnect line resistance is essential for achieving stable operation and rapid RS in a CA structure.
In selection device development part, firstly, the qualitative theoretical model was provided to estimate the electrical specification of selection device which is required in CA integration. Kirchhoffs law was used to examine the electrical specifications of selection diodes, which are essential for suppressing the read interference problems in nano-scale RS crossbar arrays with a high block density. The diode in the CA with a 100 Mb-block density should have a reverse/forward resistance ratio of > 108, and a forward current density of > 105 A/cm2 for stable reading and writing operation. Whilst normal circuit simulators are heavily overloaded when the number of cells (m) connected to one bit- and word line is larger (m >> 100), which is the desired range for high density CA, the present model can provide a simple simulation. The validity of this new method was confirmed by a comparison with the previously reported method based on voltage estimation.
Subsequently, the electrical performances of Pt/TiO2/Ti/Pt stacked SD were systematically examined, which depends on the chemical structures of the each layer and their interfaces. The Ti layers containing a tolerable amount of oxygen showed metallic electrical conduction characteristic, which was confirmed by sheet resistance measurement with elevating temperature, transmission line measurement method and Auger electron spectroscopy analysis. However, the chemical structure of SD stack was crucially affected by the dissolved oxygen concentration in the Ti layers. The lower oxidation potential of the Ti layer with higher oxygen concentration suppressed the oxygen deficiency of the overlying TiO2 layer induced by consumption of the oxygen from TiO2 layer, which results in the lower reverse current of SDs without significant degradation of forward-state current. Conductive atomic force microscopy analysis showed the current conduction through the local conduction paths in the presented SDs, which guarantees an enough forward current density as a selection device for highly integrated crossbar array resistive memory.
Finally, SD with Au/Pt/TiO2/Ti/Pt stacked structure was fabricated for its application to crossbar type RS memory. The SDs showed a highly promising rectification ratio (~2.4 x 106 @ ±2 V) between forward and reverse state currents and a high forward current density (~3 x 105 A/cm2 @ 2 V) which is useful for highly integrated crossbar RS memory. The SD has local forward current conduction paths, which provides extremely scaled devices with an advantage. The minimization of interconnection line resistance is also important to provide sufficient current to achieve stable operation of RS memory.
In the final section, the fabrication and electrical characterization issues of 1D1R type CA device was introduced. 32 × 32, 1 × 32, 2 × 2, and 4 × 4 type of CAs were fabricated. To prevent the inter-diffusion of oxygen in RS layer, the oxygen diffusion barrier layer (OBL) was inserted between SD and RS memory cell. The various materials were examined as OBL (Au, ITO, TIN, and Ni). Among the various OBLs, Ni showed excellent performance in capacitor-like 1D1R device. In addition, for CA type device fabrication, appropriate fabrication methods were developed. Finally, 1D1R CA device using previously developed SD and TiO2-based RS cell showed promising performance for next-generation non-volatile memory application.
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dc.description.tableofcontents1. Introduction……………………….…………….……….1
1.1 Resistive switching phenomenon………………………………....1
1.1.1 Resistive switching materials……………………...………..1
1.1.2 Classification of Resistive switching mechanisms...………..3
1.2 Crossbar array structure………….……………………...………..5
1.2.1 Introduction of crossbar array………………….......………..5
1.2.2 Components of CA……………………….………………….7
1.3 Scopes and organizations…………………………………………9
1.4 Bibliography…………………………………………………….12

2. Resistive switching reliability ……….………….…….14
2.1 Hour-Glass Shaped Conducting Filament (HSCF) [1]……..….14
2.1.1 Introduction………………………………………………...14
2.1.2 Experimental ………………………………………………17
2.1.3 Results and discussions…………………………………….20
2.1.4 Summary…………………………………………………...27
2.1.5 Bibliography……………………………………………….28
2.2 Minimization of interconnection line resistance in CA [2]….......29
2.2.1 Introduction………………………………………………...29
2.2.2 Experimental……………………………………………….31
2.2.3 Results and Discussions…………………………………....33
2.2.4 Summary…………………………………………………...50
2.2.5 Bibliography……………………….………………………51

3. Selection device development………………………….53
3.1 A theoretical model for Schottky diodes [3]…..………………53
3.1.1 Introduction………………………………………………...53
3.1.2 Experimental method: modeling of the CA and calculation methodology………………………………………………………...57
3.1.2.1 Sources of the sneak currents…………………………57
3.1.2.2 Formulation of the lost current (first sneak current).....62
3.1.2.3 Formulation of the added current (second sneak current)
………………………………………………………………64
3.1.3 Calculation results………………………………………….69
3.1.4 Summary…………………………………………………...74
3.1.5 Bibliography……………………………………………….75
3.2 Chemical optimization of Schottky type diode [4]…………....76
3.2.1 Introduction………………………………………………...76
3.2.2 Experimental……………………………………………….79
3.2.3 Results and Discussions…………………………………....81
3.2.4 Summary………………………………………………...101
3.2.5 Bibliography……………………….……………………103
3.3 Crossbar type Schottky diode fabrication [5]……………..…106
3.3.1 Introduction……………………………………………….106
3.3.2 Experimental…………………………………………….108
3.3.3 Results and Discussions…………………………………..110
3.3.4 Summary………………………………………………….118
3.3.5 Bibliography……………………….……………………...119

4. 32 x 32 crossbar array resistive memory composed of stacked Schottky diode and unipolar resistive memory [6] ………………………………………………...………….121
4.1. Introduction………...………………………………………….121
4.2. Experiments………..………………………………………….125
4.3. Results and Discussions……...………………………………..127
4.3.1. Integration of stacked 1D1R device using oxygen barrier layer……………………...………………………………………..…127
4.3.2. Performance of stacked 1D1R device without parallel current path………………………………………………....……..…132
4.3.3. Stacked 1D1R CA device with parallel current paths up to 32 x 32………………………………………………………………..…138
4.4. Conclusions…………………………………...……………….149
4.5. Supplementary information………………...……....…………151
4.6. Bibliography………………………….……………………….160

5. Conclusions...…………………………………………163
5.1 Improving reliability of resistive switching memory………….163
5.2 Schottky type diode fabrication and theoretical expectation for highly integrated crossbar resistive memory device………………165
5.3 Fabrication and characterization of 1diode+1resistor (1D1R) crossbar resistive memory device…………………………………...167

Curriculum Vitae…………………………..……………169
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dc.formatapplication/pdf-
dc.format.extent6187469 bytes-
dc.format.mediumapplication/pdf-
dc.language.isoen-
dc.publisher서울대학교 대학원-
dc.subjectReRAM-
dc.subjectresistive switching-
dc.subjectcrossbar array-
dc.subjectmemory element-
dc.subjectselection element-
dc.subjectSchottky type diode-
dc.subjecthour-glass shaped conducting filament-
dc.subjectinterconnection line resistance-
dc.subjectoxygen diffusion barrier layer-
dc.subject1diode + 1resistor-
dc.subject.ddc620-
dc.title1D1R (1diode and 1resistor) crossbar type device using TiO2 thin film for next generation non-volatile resistive switching random access memory application-
dc.typeThesis-
dc.contributor.AlternativeAuthorGun Hwan Kim-
dc.description.degreeDoctor-
dc.citation.pagesxvii, 190-
dc.contributor.affiliation공과대학 재료공학부-
dc.date.awarded2012-08-
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