Investigation of Three Dimensional NAND Flash Memory Based on Gate STacked ARray (GSTAR)

Abstract

Weve developed a Gate STacked ARray (GSTAR) structure as a three-dimensional memory, which extremely reduces the chip costs by vertically stacking memory arrays with easier process steps. The proposed device is a gate stack type structure having U-shaped channel to achieve high memory density without shrinking cell channel length. The GSTAR, by using an ultra-thin body structure, can reduce the off-current level, and planar cell type of GSTAR assures insensitivity to process variables such as etch-slope. The performance of designed structure is described and the optimization of device parameter is performed by using TCAD simulation. To increase device performance and ease of fabrication, the modified fabrication method to reduce the spacing between gates is also introduced.