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Cooperative Power Management for Chip Multiprocessors using Space-Shared Scheduling

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dc.contributor.advisorBernhard Egger-
dc.contributor.author이승열-
dc.date.accessioned2017-07-14T03:01:12Z-
dc.date.available2017-07-14T03:01:12Z-
dc.date.issued2015-08-
dc.identifier.other000000049824-
dc.identifier.urihttps://hdl.handle.net/10371/123176-
dc.description학위논문 (석사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2015. 8. Bernhard Egger.-
dc.description.abstract최근 Cloud Computing 서비스를 제공하는 데이터센터 등에서는 Many-core chip이 기존 Multi-core를 대체하여 사용되고 있으며 Operating System도 Many-core 시스템을 사용할 수 있게 Space-sharing 방식으로 설계가 변경되고 있다. 이러한 추세속에서 기존의 전통적인 DVFS 방식을 이용해서는 Many-core 환경에서 효율적인 전력 사용이 어렵기 때문에 추가적인 전력 관리 방법과 Many-core의 특성을 고려한 Core 재배치 기술이 필요하다.

Space-shared OS는 Core와 물리적인 메모리의 구성에 대한 자원 관리를 하는데, 최근의 Chip multiprocessor (CMP) 들은 각각의 Core에서 독립적으로 DVFS를 동작하도록 하지 않고 몇개의 Core들을 그룹화하여 Voltage 또는 Frequency를 함께 변경할 수 있도록 지원하고 있으며 메모리 또한 Coarse-grained 방식으로 독립된 파티션으로 할당 할 수 있게 관리된다. 본 연구는 이러한 CMP의 특성을 고려하여 Core 재배치와 DVFS 기술을 이용한 계층적 전력 관리 시스템을 연구하는데 목표가 있다. 특히 Core 재배치 기술은 Core의 위치에 따른 Data 성능도 함께 고려하고 있다. 이에 추가로 DVFS 성능 손실을 고려한 에너지 효율성 상승과 Core 재배치시 발생할 수 있는 효과를 미리 계산하여 최소한의 성능저하로 더 좋은 에너지 효율성을 얻을 수 있도록 연구를 진행하였다. 또한 실제 구현 및 실험은 Intel에서 출시한 Single-chip Cloud Computer (SCC)에서 진행하였으며 시나리오별로 1-2%의 성능 손실로 Performance per watt ratio가 27-32% 향상되었다. 또한 Migration 효과와 Data 지역성 등을 고려하지 않았던 기존 연구보다 성능이 5-11% 좋아졌다.
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dc.description.abstractNowadays, many-core chips are especially attractive for data center operators to provide cloud computing service models. The trend in operating system designs, furthermore, is changing from traditional time-sharing to space-shared approaches to support recent many-core architectures. These CPU and OS changes make power and thermal constraints becoming one of most important design issues. Additional power management methods and core re-allocation techniques are necessary to overcome the limitations of traditional dynamic voltage and frequency scaling (DVFS).

In this thesis, we present a cooperative hierarchical power management for many-core systems running a space-shared operating system. We consider two levels of space-shared system resources: space in the form of cores and physical memory. Recent chip multiprocessors (CMPs) provide group-level DVFS in which the voltage/frequency of cores is managed at the level of several cores instead of every single core. Memory is also allocated by a coarse-grained resource manager to isolate space partitions. Our research reflects these characteristics of CMPs.

We show how to integrate core re-allocation and DVFS techniques through cooperative hierarchical power management. The core re-allocation technique considers the data performance in dependence of the core location. In addition, two important factors are performance loss caused by DVFS and the benefit of core re-allocation. We have implemented this framework on the Intel Single Chip Cloud Computer (SCC) and achieve a 27-32% better performance per watt ratio than naive DVFS policies at the expense of a minimal 1-2% overall performance loss. Furthermore, we have achieved a 5-11% higher performance than previous research with a migration technique that uses a naive migration algorithm that does also not consider the migration benefit and data locality.
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dc.description.tableofcontentsAbstract i
Contents iii
List of Figures vi
List of Tables viii
Chapter 1 Introduction 1
Chapter 2 Related Work 4
Chapter 3 Many-core Architectures 6
3.1 The Intel Single-chip Cloud Computer 6
3.1.1 Architecture Overview 6
3.1.2 Memory Addressing 7
3.1.3 DVFS Capabilities 8
3.2 Tilera 10
3.2.1 Architecture Overview 10
3.2.2 Memory Architecture 10
3.2.3 Switch Interface and Mesh 11
Chapter 4 Zero-copy OS Migration 13
4.1 Cooperative OS Migration 14
4.2 Migration Steps 14
4.3 Migration Volatile State 15
4.4 Networking 16
Chapter 5 Cooperative Hierarchical Power Management 17
5.1 Cooperative Core Re-Allocation 17
5.2 Hierarchical Organization 18
Chapter 6 Core Re-Allocation and DVFS Policies 21
6.1 Core Re-Allocation Considerations 22
6.2 Core Re-Allocation Algorithm 24
6.3 Evaluation of Core Re-Allocation 27
6.4 DVFS Policies 28
Chapter 7 Experimentation and Evaluation 29
7.1 Experimental Setup 29
7.2 Power Management Considerations 30
7.2.1 DVFS Performance Loss 31
7.2.2 Migration Benefit 32
7.2.3 Data-location Aware Migration 33
7.3 Results 34
7.3.1 Synthetic Periodic Workload 34
7.3.2 Profiled Workload 37
7.3.3 World Cup Workload 40
7.3.4 Overall Results 40
Chapter 8 Conclusion 43
APPENDICES 43
Chapter A Profiled Workload Benchmark Scenarios 44
A.1 Synthetic Benchmark Scenario based on Periodic Workloads 45
A.1.1 Synthetic Benchmark Scenario 1 45
A.1.2 Synthetic Benchmark Scenario 2 45
A.2 Memory Synthetic Benchmark Scenario based on Periodic Workloads 46
A.2.1 Memory Synthetic Benchmark Scenario 1 46
A.2.2 Memory Synthetic Benchmark Scenario 2 46
A.3 Benchmark Scenario based on Profiled Workloads 47
A.3.1 Profiled Benchmark Scenario 1 47
A.3.2 Profiled Benchmark Scenario 2 47
A.3.3 Profiled Benchmark Scenario 3 48
요약 54
Acknowledgements 55
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dc.formatapplication/pdf-
dc.format.extent3759491 bytes-
dc.format.mediumapplication/pdf-
dc.language.isoen-
dc.publisher서울대학교 대학원-
dc.subjectMany-core Architecture-
dc.subjectScheduling-
dc.subjectDVFS-
dc.subjectEnergy Efficiency-
dc.subject.ddc621-
dc.titleCooperative Power Management for Chip Multiprocessors using Space-Shared Scheduling-
dc.typeThesis-
dc.description.degreeMaster-
dc.citation.pagesviii, 56-
dc.contributor.affiliation공과대학 전기·컴퓨터공학부-
dc.date.awarded2015-08-
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