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Characterization of Trap Generated By Process and Cycling Stress in 26 nm NAND Flash Memory
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 이종호 | - |
dc.contributor.author | 조봉수 | - |
dc.date.accessioned | 2017-07-14T03:03:31Z | - |
dc.date.available | 2017-07-14T03:03:31Z | - |
dc.date.issued | 2013-02 | - |
dc.identifier.other | 000000010483 | - |
dc.identifier.uri | https://hdl.handle.net/10371/123223 | - |
dc.description | 학위논문 (석사)-- 서울대학교 대학원 : 전기‧컴퓨터공학과, 2013. 2. 이종호. | - |
dc.description.abstract | Trap in 26 nm NAND flash memory was characterized in terms of bit-line (BL) current fluctuation (∆IBL), extraction of trap position in 3-D space (xT, yT, and zT) of the tunneling oxide and trap energy (Et). Especially, percolation path could be identified and accurate zT could be obtained, using the states of adjacent cells. Then, ∆IBL, S_I/I_BL^2, capture (τc) and emission times (τe) of RTN were measured before and after cycling stress, respectively. With cycling stress, S_I/I_BL^2 and ∆IBL were increased significantly. τc and τe of RTN after cycling stress are shorter by about 2~3 times than those of RTN generated by process stress. With the program (P) and erase (E) states of adjacent cells, ∆IBL and corner frequency (fc) of Lorentzian spectrum are changed. Using measured ∆IBL and extracted τc and τe with 4 different modes (P/P, P/E, E/P, E/E), we calculated τ and fc, and extracted the position of a trap in the channel width direction with ∆IBL and simulated data. The calculated data showed excellent agreement with measured spectra. Finally, trap was characterized with the method charge pumping method. | - |
dc.description.tableofcontents | CONTENTS
Abstract i Contents iii 1. Introduction 1 2. Extraction of 3-D Position of Trap in 26nm NAND Flash Memory 3 3. The effect of adjacent cells and extraction of more accurate position of zT with percolation path 8 4. Characterization of RTN Generated by Process and Cycling Stress Induced Traps in 26 nm NAND Flash Memory 19 5. Conclusion 27 References 28 Abstract in Korean 31 | - |
dc.format | application/pdf | - |
dc.format.extent | 1677782 bytes | - |
dc.format.medium | application/pdf | - |
dc.language.iso | en | - |
dc.publisher | 서울대학교 대학원 | - |
dc.subject.ddc | 621 | - |
dc.title | Characterization of Trap Generated By Process and Cycling Stress in 26 nm NAND Flash Memory | - |
dc.type | Thesis | - |
dc.description.degree | Master | - |
dc.citation.pages | 38 | - |
dc.contributor.affiliation | 공과대학 전기공학부 | - |
dc.date.awarded | 2013-02 | - |
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