Publications

Detailed Information

Design of High-Speed CMOS Interface Circuits for Optical Communications

DC Field Value Language
dc.contributor.advisor정덕균-
dc.contributor.author정규섭-
dc.date.accessioned2017-10-27T16:41:42Z-
dc.date.available2017-10-27T16:41:42Z-
dc.date.issued2017-08-
dc.identifier.other000000146002-
dc.identifier.urihttps://hdl.handle.net/10371/136801-
dc.description학위논문 (박사)-- 서울대학교 대학원 공과대학 전기·컴퓨터공학부, 2017. 8. 정덕균.-
dc.description.abstractThe bandwidth requirement of wireline communications has increased ex-ponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effect, dielectric loss, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul net-works and metropolitan area networks, to the medium- and short-reach com-munication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challeng-es are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics that has long been investigated by a number of research groups. De-spite inherent incompatibility of silicon with the photonic world, silicon pho-tonics is promising and is the only solution that can leverage the mature CMOS technologies.
In this thesis, we summarize the current status of silicon photonics and pro-vide the prospect of the optical interconnection. We also present key circuit techniques essential to the implementation of high-speed and low-power optical receivers. And then, we propose optical receiver architectures satisfying the aforementioned requirements with novel circuit techniques.
-
dc.description.tableofcontentsCHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 THESIS ORGANIZATION 6
CHAPTER 2 BACKGROUND OF OPTICAL COMMUNICATION 7
2.1 OVERVIEW OF OPTICAL LINK 7
2.2 SILICON PHOTONICS 11
2.3 HYBRID INTEGRATION 22
2.4 SILICON-BASED PHOTODIODES 28
2.4.1 BASIC TERMINOLOGY 28
2.4.2 SILICON PD 29
2.4.3 GERMANIUM PD 32
2.4.4 INTEGRATION WITH WAVEGUIDE 33
CHAPTER 3 CIRCUIT TECHNIQUES FOR OPTICAL RECEIVER 35
3.1 BASIS OF TRANSIMPEDANCE AMPLIFIER 35
3.2 TOPOLOGY OF TIA 39
3.2.1 RESISTOR-BASED TIA 39
3.2.2 COMMON-GATE-BASED TIA 41
3.2.3 FEEDBACK-BASED TIA 44
3.2.4 INVERTER-BASED TIA 47
3.2.5 INTEGRATING RECEIVER 48
3.3 BANDWIDTH EXTENSION TECHNIQUES 49
3.3.1 INDUCTOR-BASED TECHNIQUE 49
3.3.2 EQUALIZATION 61
3.4 CLOCK AND DATA RECOVERY CIRCUITS 66
3.4.1 CDR BASIC 66
3.4.2 CDR EXAMPLES 68
CHAPTER 4 LOW-POWER OPTICAL RECEIVER FRONT-END 73
4.1 OVERVIEW 73
4.2 INVERTER-BASED TIA WITH RESISTIVE FEEDBACK 74
4.3 INVERTER-BASED TIA WITH RESISTIVE AND INDUCTIVE FEEDBACK 81
4.4 CIRCUIT IMPLEMENTATION 89
4.5 MEASUREMENT RESULTS 93
CHAPTER 5 BANDWIDTH- AND POWER-SCALABLE OPTICAL RECEIVER FRONT-END 96
5.1 OVERVIEW 96
5.2 BANDWIDTH AND POWER SCALABILITY 97
5.3 GM STABILIZATION 98
5.4 OVERALL BLOCK DIAGRAM OF RECEIVER 104
5.5 MEASUREMENT RESULTS 111
CHAPTER 6 CONCLUSION 118
BIBLIOGRAPHY 120
초 록 131
-
dc.formatapplication/pdf-
dc.format.extent3077764 bytes-
dc.format.mediumapplication/pdf-
dc.language.isoen-
dc.publisher서울대학교 대학원-
dc.subjectCMOS technologies-
dc.subjectoptical communication-
dc.subjectoptical receiver-
dc.subjectsilicon photonics-
dc.subject.ddc621.3-
dc.titleDesign of High-Speed CMOS Interface Circuits for Optical Communications-
dc.typeThesis-
dc.description.degreeDoctor-
dc.contributor.affiliation공과대학 전기·컴퓨터공학부-
dc.date.awarded2017-08-
Appears in Collections:
Files in This Item:

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share