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Novel program method of string select transistors for layer selection in channel-stacked NAND flash memory
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kwon, Dae Woong | - |
dc.contributor.author | Kim, Wandong | - |
dc.contributor.author | Kim, Do-Bin | - |
dc.contributor.author | Lee, Sang-Ho | - |
dc.contributor.author | Seo, Joo Yun | - |
dc.contributor.author | Choi, Eunseok | - |
dc.contributor.author | Cho, Gyu Seog | - |
dc.contributor.author | Park, Sung-Kye | - |
dc.contributor.author | Lee, Jong-Ho | - |
dc.contributor.author | Park, Byung-Gook | - |
dc.creator | 박병국 | - |
dc.date.accessioned | 2018-01-24T05:59:57Z | - |
dc.date.available | 2020-04-05T05:59:57Z | - |
dc.date.created | 2018-09-07 | - |
dc.date.created | 2018-09-07 | - |
dc.date.issued | 2016-09 | - |
dc.identifier.citation | IEEE Transactions on Electron Devices, Vol.63 No.9, pp.3521-3526 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://hdl.handle.net/10371/139010 | - |
dc.description.abstract | In this paper, we propose new string select transistors (SSTs)/dummy SSTs (DSSTs) threshold voltage (V-th) setting methods in simplified channel-stacked array with layer selection by multilevel operation (SLSM). In these methods, SSTs/DSSTs on each layer are set to their targeted V-th values by incremental step pulse program/one erase with various erase voltages, respectively. In the fabricated pseudo-SLSM, the validity of the new methods is verified. As a result, it is confirmed that the V-th values of SSTs/DSSTs are set to the targeted V-th values by the new methods and SSTs with extremely narrow V-th distribution can be obtained in the consequence. Moreover, memory operations such as erase, program, and read are performed in the fabricated structure after setting the V-th values of all the SSTs/DSSTs by the new methods. Despite unique LSM operations, stable memory operations are obtained successfully without the interference between stacked layers. | - |
dc.language | 영어 | - |
dc.language.iso | en | en |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.title | Novel program method of string select transistors for layer selection in channel-stacked NAND flash memory | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TED.2016.2593909 | - |
dc.citation.journaltitle | IEEE Transactions on Electron Devices | - |
dc.identifier.wosid | 000384574400022 | - |
dc.identifier.scopusid | 2-s2.0-84981719039 | - |
dc.description.srnd | OAIID:RECH_ACHV_DSTSH_NO:T201633485 | - |
dc.description.srnd | RECH_ACHV_FG:RR00200001 | - |
dc.description.srnd | ADJUST_YN: | - |
dc.description.srnd | EMP_ID:A001741 | - |
dc.description.srnd | CITE_RATE:2.605 | - |
dc.description.srnd | DEPT_NM:전기·정보공학부 | - |
dc.description.srnd | EMAIL:bgpark@snu.ac.kr | - |
dc.description.srnd | SCOPUS_YN:Y | - |
dc.citation.endpage | 3526 | - |
dc.citation.number | 9 | - |
dc.citation.startpage | 3521 | - |
dc.citation.volume | 63 | - |
dc.description.isOpenAccess | N | - |
dc.contributor.affiliatedAuthor | Lee, Jong-Ho | - |
dc.contributor.affiliatedAuthor | Park, Byung-Gook | - |
dc.identifier.srnd | T201633485 | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.subject.keywordAuthor | 3-D NAND flash memory | - |
dc.subject.keywordAuthor | channel-stacked NAND flash memory | - |
dc.subject.keywordAuthor | layer selection by multilevel operation (LSM) | - |
dc.subject.keywordAuthor | stacked layer selection | - |
dc.subject.keywordAuthor | string select transistor (SST) threshold voltage setting | - |
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