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Charon: Specialized near-memory processing architecture for clearing dead objects in memory

Cited 13 time in Web of Science Cited 17 time in Scopus
Authors

Jang, Jaeyoung; Heo, Jun; Lee, Yejin; Won, Jaeyeon; Kim, Seonghak; Jung, Sung Jun; Jang, Hakbeom; Ham, Tae Jun; Lee, Jae Wook

Issue Date
2019-10
Publisher
MICRO
Citation
Proceedings of the Annual International Symposium on Microarchitecture, MICRO, pp.726-739
Abstract
© 2019 Association for Computing Machinery.programming, saving a programmer from many nasty memoryrelated bugs. However, these productivity benefits come with a cost in terms of application throughput, worst-case latency, and energy consumption. Since the first introduction of GC by the Lisp programming language in the 1950s, a myriad of hardware and software techniques have been proposed to reduce this cost. While the idea of accelerating GC in hardware is appealing, its impact has been very limited due to narrow coverage, lack of flexibility, intrusive system changes, and significant hardware cost. Even with specialized hardware GC performance is eventually limited by memory bandwidth bottleneck. Fortunately, emerging 3D stacked DRAM technologies shed new light on this decades-old problem by enabling efficient near-memory processing with ample memory bandwidth. Thus, we propose Charon1, the first 3D stacked memory-based GC accelerator. Through a detailed performance analysis of HotSpot JVM, we derive a set of key algorithmic primitives based on their GC time coverage and implementation complexity in hardware. Then we devise a specialized processing unit to substantially improve their memory-level parallelism and throughput with a low hardware cost. Our evaluation of Charon with the full-production HotSpot JVM running two big data analytics frameworks, Spark and GraphChi, demonstrates a 3.29 geomean speedup and 60.7% energy savings for GC over the baseline 8-core out-of-order processor.
ISSN
1072-4451
URI
https://hdl.handle.net/10371/186092
DOI
https://doi.org/10.1145/3352460.3358297
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