Publications

Detailed Information

Influence of Etch Profiles on the Leakage Current and Capacitance of 3-D DRAM Storage Capacitors

Cited 4 time in Web of Science Cited 4 time in Scopus
Authors

Shin, Seongun; Yoon, Gyuhan; Choi, Woo Young

Issue Date
2019-04
Publisher
대한전자공학회
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, Vol.19 No.2, pp.208-213
Abstract
The influence of etch profiles on leakage current and capacitance of three-dimensional (3-D) dynamic random access memory (DRAM) storage capacitors is investigated by using full 3-D technology computer-aided design (TCAD) simulation. According to the simulation results calibrated by experimental data, as the ratio of bottom critical dimension (CDBOT) to top critical dimension (CDTOP) of a DRAM storage capacitor decreases, storage capacitance (C-s) decreases while leakage current (I-leak) increases. Thus, it is important to achieve steep etch profiles during the fabrication of DRAM storage capacitors for higher DRAM capacity and longer refresh time.
ISSN
1598-1657
URI
https://hdl.handle.net/10371/186757
DOI
https://doi.org/10.5573/JSTS.2019.19.2.208
Files in This Item:
There are no files associated with this item.
Appears in Collections:

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share