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Monolithic Three-Dimensional 65-nm CMOS-Nanoelectromechanical Reconfigurable Logic for Sub-1.2-V Operation
Cited 33 time in
Web of Science
Cited 34 time in Scopus
- Authors
- Issue Date
- 2017-09
- Citation
- IEEE Electron Device Letters, Vol.38 No.9, pp.1317-1320
- Abstract
- Monolithic three-dimensional (M3D) CMOS-nanoelectromechanical (CMOS-NEM) reconfigurable logic (RL) circuits are experimentally demonstrated. This is the first experimental demonstration of 65-nm M3D CMOS-NEM RL circuits satisfying the 1.2-V supply voltage (VDD) requirement of the 65-nm technology node. The fabrication process is identical to the conventional 65-nm CMOS baseline process, in which copper NEM memory switches are formed by a dual damascene process.
- ISSN
- 0741-3106
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