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Nanoelectromechanical (NEM) Devices for Logic and Memory Applications

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Authors

Kwon, Hyug Su; Choi, Woo Young

Issue Date
2022-06
Publisher
대한전자공학회
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, Vol.22 No.3, pp.188-197
Abstract
© 2022, Institute of Electronics Engineers of Korea. All rights reserved.—Recent research on NEM devices for logic and memory applications has been reviewed from the perspective of monolithic 3D (M3D) heterogeneous integration. In addition, the backgrounds of M3D CMOS-NEM reconfigurable logic (RL) circuits are described in detail. Moreover, 65-nm process based M3D CMOS-NEM RL circuits were proposed. It is predicted that proposed M3D CMOS-NEM RL circuits will exhibit 4.6x higher chip density, 2.3x higher operation frequency and 9.3x lower power consumption than CMOS-only ones (tri-state buffer case) for tile-to-tile operation.
ISSN
1598-1657
URI
https://hdl.handle.net/10371/186815
DOI
https://doi.org/10.5573/JSTS.2022.22.3.188
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