Publications

Detailed Information

Scaling Trends of Monolithic 3-D Complementary Metal-Oxide-Semiconductor Nanoelectromechanical Reconfigurable Logic Circuits

Cited 8 time in Web of Science Cited 9 time in Scopus
Authors

Ko, Ji Wang; Baek, Gwangryeol; Choi, Woo Young

Issue Date
2020-09
Publisher
Institute of Electrical and Electronics Engineers
Citation
IEEE Transactions on Electron Devices, Vol.67 No.9, pp.3861-3867
Abstract
The scaling trends of monolithic 3-D (M3-D) complementary metal-oxide-semiconductor (CMOS) nanoelectromechanical (NEM) reconfigurable logic (RL) circuits are compared with CMOS-only circuits for the first time. It is confirmed that M3-D CMOS-NEM RL circuits are superior to CMOS-only circuits in terms of propagation delay, power consumption, and power-delay product (PDP) because of the low resistance and full signal swing of NEM memory switches that not only affect the current switch block but also the following block. Because the performance, power, and energy gains of the CMOS-NEM RL circuits over CMOS-only circuits increase as the technology node improves, M3-D CMOS-NEM RL circuits can be considered as one of the most promising candidates for high-density, high-performance, and low-power RL circuits.
ISSN
0018-9383
URI
https://hdl.handle.net/10371/186909
DOI
https://doi.org/10.1109/TED.2020.3008880
Files in This Item:
There are no files associated with this item.
Appears in Collections:

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share