Publications

Detailed Information

Making DRAM Stronger Against Row Hammering

DC Field Value Language
dc.contributor.authorSon, M.-
dc.contributor.authorPark, H.-
dc.contributor.authorAhn, J.-
dc.contributor.authorYoo, S.-
dc.date.accessioned2023-06-27T06:38:22Z-
dc.date.available2023-06-27T06:38:22Z-
dc.date.created2023-06-19-
dc.date.issued2017-
dc.identifier.citationProceedings - Design Automation Conference, Vol.Part 128280, p. 55-
dc.identifier.issn0146-7123-
dc.identifier.urihttps://hdl.handle.net/10371/192905-
dc.description.abstractModern DRAM suffers from a new problem called row hammering. The problem is expected to become more severe in future DRAMs mostly due to increased inter-row coupling at advanced technology. In order to address this problem, we present a probabilistically managed table (called PRoHIT) implemented on the DRAM chip. The table keeps track of victim row candidates in a probabilistic way and, in case of auto-refresh, the topmost entry is additionally refreshed thereby mitigating the row hammering problem. Our experiments with PARSEC benchmark and synthetic traces show that PRoHIT outperforms the state-of-The-Art method, PARA, by 35.7% (PARSEC) in terms of the reduction ratio of row-hammer cases. Our proposed method also shows constantly superior performance to PARA for synthetic traces. © 2017 ACM.-
dc.language영어-
dc.publisherProceedings - Design Automation Conference-
dc.titleMaking DRAM Stronger Against Row Hammering-
dc.typeArticle-
dc.citation.journaltitleProceedings - Design Automation Conference-
dc.identifier.scopusid2-s2.0-85023594788-
dc.citation.startpage55-
dc.citation.volumePart 128280-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorYoo, S.-
dc.description.journalClass1-
Appears in Collections:
Files in This Item:
There are no files associated with this item.

Altmetrics

Item View & Download Count

  • mendeley

Items in S-Space are protected by copyright, with all rights reserved, unless otherwise indicated.

Share