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A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45 degrees Strobe Phase for Energy-Efficient Skew Compensation

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dc.contributor.authorLee, Sangyoon-
dc.contributor.authorKo, Han-Gon-
dc.contributor.authorChae, Joo-Hyung-
dc.contributor.authorShin, Soyeong-
dc.contributor.authorYun, Jaekwang-
dc.contributor.authorJeong, Deog-Kyoon-
dc.contributor.authorKim, Suhwan-
dc.date.accessioned2023-11-24T04:40:06Z-
dc.date.available2023-11-24T04:40:06Z-
dc.date.created2020-10-27-
dc.date.issued2020-10-
dc.identifier.citationIEEE Transactions on Circuits and Systems II: Express Briefs, Vol.67 No.10, pp.1735-1739-
dc.identifier.issn1549-7747-
dc.identifier.urihttps://hdl.handle.net/10371/197528-
dc.description.abstractSkews between data and strobe signals can occur in HBM transceivers due to process and voltage variations across the base die. Skew compensation is introduced into the deserializers of our quarter-rate single-ended receiver for next-generation unmatched source-synchronous HBM interfaces. Data and strobe signals are energy-efficiently realigned by using a 45 degrees strobe phase DQS(45). This phase, which is equidistant between quadrature strobe phases DQS(0) and DQS(90), is generated by a digital type phase interpolator of our receiver. The transceiver, including the proposed receiver, was designed and fabricated in a 65nm CMOS process. The receiver corrects skews to within 7.8ps at a data-rate of 6.4Gb/s, with an energy cost of 0.83pJ/bit per pin.-
dc.language영어-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleA 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45 degrees Strobe Phase for Energy-Efficient Skew Compensation-
dc.typeArticle-
dc.identifier.doi10.1109/TCSII.2019.2947296-
dc.citation.journaltitleIEEE Transactions on Circuits and Systems II: Express Briefs-
dc.identifier.wosid000572634400012-
dc.identifier.scopusid2-s2.0-85092191339-
dc.citation.endpage1739-
dc.citation.number10-
dc.citation.startpage1735-
dc.citation.volume67-
dc.description.isOpenAccessN-
dc.contributor.affiliatedAuthorJeong, Deog-Kyoon-
dc.contributor.affiliatedAuthorKim, Suhwan-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.subject.keywordPlusCLOCK-
dc.subject.keywordAuthorQuarter-rate receiver-
dc.subject.keywordAuthorsingle-ended signaling-
dc.subject.keywordAuthormemory interface-
dc.subject.keywordAuthorunmatched source-synchronous scheme-
dc.subject.keywordAuthorskew compensation scheme-
dc.subject.keywordAuthorHBM base die-
dc.subject.keywordAuthorphase interpolation-
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