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A Fully Integrated Compact Outphasing CMOS Power Amplifier Using a Parallel-Combining Transformer with a Tuning Inductor Method
Cited 4 time in
Web of Science
Cited 4 time in Scopus
- Authors
- Issue Date
- 2020-02
- Publisher
- MDPI
- Citation
- ELECTRONICS, Vol.9 No.2
- Abstract
- This work presents a compact on-chip outphasing power amplifier with a parallel-combining transformer (PCT). A series-combining transformer (SCT) and PCT are analyzed as power-combining transformers for outphasing operations. Compared to the SCT, which is typically used for on-chip outphasing combiners, the PCT is much smaller. The outphasing operations of the transformer combiners and class-D switching PAs are also analyzed. A tuning inductor method is proposed to improve the efficiency of class-D power amplifiers (PAs) with power-combining transformers in the out-of-phase mode. The proposed PA was implemented with a standard 0.18 mu m CMOS process. The measured maximum drain efficiency is 37.3% with an output power of 22.4 dBm at 1.7 GHz. A measured adjacent channel leakage ratio (ACLR) of less than -30 dBc is obtained for a long-term evolution (LTE) signal with a bandwidth of 10 MHz.
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Related Researcher
- College of Engineering
- Department of Electrical and Computer Engineering
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